Gabriele Serra

Orcid: 0000-0003-0225-6731

According to our database1, Gabriele Serra authored at least 11 papers between 2002 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Links

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Bibliography

2024
Memory Integrity Techniques for Memory-Unsafe Languages: A Survey.
IEEE Access, 2024

2023
Maximizing the Security Level of Real-Time Software While Preserving Temporal Constraints.
IEEE Access, 2023

Enhancing the Availability of Web Services in the IoT-to-Edge-to-Cloud Compute Continuum: A WordPress Case Study.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

Bounded transmission latency in real-time edge computing: a scheduling analysis.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

2022
PAC-PL: Enabling Control-Flow Integrity with Pointer Authentication in FPGA SoC Platforms.
Proceedings of the 28th IEEE Real-Time and Embedded Technology and Applications Symposium, 2022

2021
ReTiF: A declarative real-time scheduling framework for POSIX systems.
J. Syst. Archit., 2021

Scheduling Replica Voting in Fixed-Priority Real-Time Systems.
Proceedings of the 33rd Euromicro Conference on Real-Time Systems, 2021

2020
An Architecture for Declarative Real-Time Scheduling on Linux.
Proceedings of the 23rd IEEE International Symposium on Real-Time Distributed Computing, 2020

2019
EN-50128 Certification-Oriented Design of a Safety-Critical Hard Real-Time Kernel.
Proceedings of the IEEE International Symposium on Software Reliability Engineering Workshops, 2019

2007
Hybrid modelling and control of the common rail injection system.
Int. J. Control, 2007

2002
Control oriented models for TWC-equipped spark ignition engines during the warm-up phase.
Proceedings of the American Control Conference, 2002


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