Gaston Cambon

According to our database1, Gaston Cambon authored at least 25 papers between 1985 and 2007.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2007
Technological hybridization for efficient runtime reconfigurable FPGAs.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

2006
Remanent SRAM Structure for Runtime Reconfigurable FPGA.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006

New non-volatile FPGA concept using Magnetic Tunneling Junction.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Dynamic Hardware Multiplexing: Improving Adaptability with a Run Time Reconfiguration Manager.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Magnetic tunnelling junction based FPGA.
Proceedings of the ACM/SIGDA 14th International Symposium on Field Programmable Gate Arrays, 2006

2005
Méthode de caractérisation des architectures d'accélérateurs flexibles pour systèmes sur puce.
Tech. Sci. Informatiques, 2005

Current mask generation: a transistor level security against DPA attacks.
Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005

A new hardware countermeasure for masking power signatures of crypto cores.
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005

Non-volatile SRAM-FPGA based on magnetic tunnelling junction.
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005

Automatic Task Scheduling / Loop Unrolling using Dedicated RTR Controllers in Coarse Grain Reconfigurable Architectures.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

Magnetic remanent memory structures for dynamically reconfigurable fine grain FPGA.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Run-Time Scheduling for Random Multi-Tasking in Reconfigurable Coprocessors.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Dynamic hardware multiplexing for coarse grain reconfigurable architectures.
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005

2004
Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability.
Proceedings of the Computer Systems: Architectures, 2004

2003
Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

A Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring.
Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2002
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications.
Proceedings of the 2002 Design, 2002

2001
A Dynamically Reconfigurable Architecture for Embedded Systems.
Proceedings of the 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 2001

Dynamically Reconfigurable Architectures for Digital Signal Processing Applications.
Proceedings of the SOC Design Methodologies, 2001

The Systolic Ring: A Dynamically Reconfigurable Architecture for Embedded Systems.
Proceedings of the Field-Programmable Logic and Applications, 2001

1999
Fast Prototyping: A Case Study - The JPEG Compression Algorithm.
Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping (RSP 1999), 1999

1996
Concurrent Design of Hardware/Software Dedicated Systems.
Proceedings of the Field-Programmable Logic, 1996

1992
Electrical analysis and modeling of floating-gate fault.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992

A functional BIST approach for FIR digital filters.
Proceedings of the 10th IEEE VLSI Test Symposium (VTS'92), 1992

1985
FSPICE: a tool for fault modelling in MOS circuits.
Integr., 1985


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