Georgios D. Dimou

Orcid: 0009-0009-4755-2199

According to our database1, Georgios D. Dimou authored at least 8 papers between 2007 and 2023.

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Bibliography

2023
BASALISC: Programmable Hardware Accelerator for BGV Fully Homomorphic Encryption.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023

Island-based Random Dynamic Voltage Scaling vs ML-Enhanced Power Side-Channel Attacks.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

2022
BASALISC: Flexible Asynchronous Hardware Accelerator for Fully Homomorphic Encryption.
IACR Cryptol. ePrint Arch., 2022

2018
Loihi: A Neuromorphic Manycore Processor with On-Chip Learning.
IEEE Micro, 2018

2014
Performance-Driven Clustering of Asynchronous Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

A 72-Port 10G Ethernet Switch/Router Using Quasi-Delay-Insensitive Asynchronous Design.
Proceedings of the 20th IEEE International Symposium on Asynchronous Circuits and Systems, 2014

2011
Proteus: An ASIC Flow for GHz Asynchronous Designs.
IEEE Des. Test Comput., 2011

2007
Design of a High-Speed Asynchronous Turbo Decoder.
Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2007), 2007


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