Guangjun Ge

Orcid: 0000-0001-5855-6480

According to our database1, Guangjun Ge authored at least 16 papers between 2017 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Soft Error Tolerant Convolutional Neural Networks on FPGAs With Ensemble Learning.
IEEE Trans. Very Large Scale Integr. Syst., 2022

A Unified FPGA Virtualization Framework for General-Purpose Deep Neural Networks in the Cloud.
ACM Trans. Reconfigurable Technol. Syst., 2022

A Mobile Robot Experiment System with Lightweight Simulator Generator for Deep Reinforcement Learning Algorithm.
Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2022

MR-GMMExplore: Multi-Robot Exploration System in Unknown Environments based on Gaussian Mixture Model.
Proceedings of the IEEE International Conference on Robotics and Biomimetics, 2022

2021
FTT-NAS: Discovering Fault-tolerant Convolutional Neural Architecture.
ACM Trans. Design Autom. Electr. Syst., 2021

Ensemble of Pruned Networks for Reliable Classifiers.
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021

2020
FTT-NAS: Discovering Fault-Tolerant Neural Architecture.
CoRR, 2020

Enable Efficient and Flexible FPGA Virtualization for Deep Learning in the Cloud.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Enabling Efficient and Flexible FPGA Virtualization for Deep Learning in the Cloud.
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

Reliability Evaluation of Pruned Neural Networks against Errors on Parameters.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2020

FTT-NAS: Discovering Fault-Tolerant Neural Architecture.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

Soft Error Mitigation for Deep Convolution Neural Network on FPGA Accelerators.
Proceedings of the 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2020

2018
Design and Analysis of Adaptive Message Coding on LDPC Decoder with Faulty Storage.
Wirel. Commun. Mob. Comput., 2018

Instruction Driven Cross-layer CNN Accelerator for Fast Detection on FPGA.
ACM Trans. Reconfigurable Technol. Syst., 2018

2017
LDPC Decoder with Embedded Coding on Unreliable Memories.
Proceedings of the 2017 IEEE Global Communications Conference, 2017

Adaptive package coding on unreliable memories for LDPC decoders in radiation environment.
Proceedings of the 23rd Asia-Pacific Conference on Communications, 2017


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