Guilei Wang

According to our database1, Guilei Wang authored at least 4 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Article 
PhD thesis 
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Links

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Bibliography

2024
Vertical Surrounding Gate Transistor for High Density and Low Voltage Operation in DRAM.
IEEE Access, 2024

2023
A 3D Stackable 1T1C DRAM: Architecture, Process Integration and Circuit Simulation.
Proceedings of the IEEE International Memory Workshop, 2023

Dielectric Relaxation Performance of DRAM Storage Capacitors and Ways of Improvement.
Proceedings of the IEEE International Memory Workshop, 2023

2022
Scaling Dual-Gate Ultra-thin a-IGZO FET to 30 nm Channel Length with Record-high Gm, max of 559 µS/µm at VDS=1 V, Record-low DIBL of 10 mV/V and Nearly Ideal SS of 63 mV/dec.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022


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