Hanyue Li

Orcid: 0000-0002-0554-167X

According to our database1, Hanyue Li authored at least 27 papers between 2015 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
A 14-Bit Oversampled SAR ADC With Mismatch Error Shaping and Analog Range Compensation.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2023

A 77.3-dB SNDR 62.5-kHz Bandwidth Continuous-Time Noise-Shaping SAR ADC With Duty-Cycled G<sub>m</sub>-C Integrator.
IEEE J. Solid State Circuits, 2023

A 10-bit 10 MS/s SAR ADC with Duty-Cycled Multiple Feedback Filter.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

Ultra Low Power Event-Driven Sensor Interfaces.
Proceedings of the 9th International Workshop on Advances in Sensors and Interfaces, 2023

A 2.98pJ/conversion 0.0023mm2 Dynamic Temperature Sensor with Fully On-Chip Corrections.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023

A 0.0033 mm<sup>2</sup> 3.5 fJ/conversion-step SAR ADC with 2× Input Range Boosting.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
A 2.2 fJ/Conversion-Step 9.74-ENOB 10 MS/s SAR ADC With $1.5×Input Range.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Small-Area SAR ADCs With a Compact Unit-Length DAC Layout.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A 103-dB SFDR Calibration-Free Oversampled SAR ADC With Mismatch Error Shaping and Pre-Comparison Techniques.
IEEE J. Solid State Circuits, 2022

A 7.3-μ W 13-ENOB 98-dB SFDR Noise-Shaping SAR ADC With Duty-Cycled Amplifier and Mismatch Error Shaping.
IEEE J. Solid State Circuits, 2022

A First-Order Continuous-Time Noise-Shaping SAR ADC with Duty-Cycled Integrator.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

A SAR ADC with Reconfigurable Delay and Redundancy to Relax the Reference Driver.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A l0-bit 4 MS/s SAR ADC with Fully-Dynamic Duty-Cycled Input Driver.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

GCMK: Detecting Spam Movie Review Based on Graph Convolutional Network Embedding Movie Background Knowledge.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2022, 2022

Stability Considerations for a Synchronous Interconnection of the North American Eastern and Western Electric Grids.
Proceedings of the 55th Hawaii International Conference on System Sciences, 2022

A 2.74pJ/conversion 0.0018mm<sup>2</sup> Temperature Sensor with On-chip Gain and Offset Correction.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

2021
Integration of Renewable Generators in Synthetic Electric Grids for Dynamic Analysis.
CoRR, 2021

Coupled Infrastructure Simulation of Electric Grid and Transportation Networks.
Proceedings of the IEEE Power & Energy Society Innovative Smart Grid Technologies Conference, 2021

Analysis of the Sampling Noise Cancellation Technique in a Track-and-Hold Amplifier.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

Towards the Automation of Remedial Action Schemes Design.
Proceedings of the 54th Hawaii International Conference on System Sciences, 2021

An 80dB-SNDR 98dB-SFDR Noise-Shaping SAR ADC with Duty-Cycled Amplifier and Digital-Predicted Mismatch Error Shaping.
Proceedings of the 47th ESSCIRC 2021, 2021

A low-cost 0.98μW0.8V oversampled SAR ADC with pre-comparison and mismatch error shaping achieving 84.5dB SNDR and 103dB SFDR.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2020
Application of Transformer Impedance Correction Tables in Power Flow Studies.
CoRR, 2020

2019
The Creation and Validation of Load Time Series for Synthetic Electric Power Systems.
CoRR, 2019

Synthesize Phasor Measurement Unit Data Using Large-Scale Electric Network Models.
CoRR, 2019

Low-power SAR ADCs: trends, examples and future.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2015
A mixed behavior/structural model for analog LDPC decoders including mismatch effects and dynamic behavior.
Proceedings of the International Conference on Wireless Communications & Signal Processing, 2015


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