Anirudh Kankuppe

Orcid: 0000-0002-0114-1193

According to our database1, Anirudh Kankuppe authored at least 9 papers between 2016 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A 7-bit 150-GSa/s DAC in 5-nm FinFET CMOS.
IEEE J. Solid State Circuits, April, 2026

11.5 A Compact 7b 175GS/s Linearized Time-Interleaved Slope ADC with Switched Input Buffers.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026

2025
Photonics-enabled Code-Division Multiplexing FMCW Distributed Radar.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2025

2022
A D-Band Low-Power and High-Efficiency Frequency Multiply-by-9 FMCW Radar Transmitter in 28-nm CMOS.
IEEE J. Solid State Circuits, 2022

A 67-mW D-Band FMCW I/Q Radar Receiver With an N-Path Spillover Notch Filter in 28-nm CMOS.
IEEE J. Solid State Circuits, 2022

2021
A 28-nm-CMOS Based 145-GHz FMCW Radar: System, Circuits, and Characterization.
IEEE J. Solid State Circuits, 2021

A 67mW D-band FMCW I/Q Radar Receiver with an N-path Spillover Notch Filter in 28nm CMOS.
Proceedings of the 47th ESSCIRC 2021, 2021

2020
17.7 A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/µs Slope and 1.2GHz Chirp Bandwidth.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2016
Programmable memristor emulator ASIC for biologically inspired memristive learning.
Proceedings of the 39th International Conference on Telecommunications and Signal Processing, 2016


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