Harald Homulle

Orcid: 0000-0002-8798-5409

Affiliations:
  • Delft University of Technology, Netherlands


According to our database1, Harald Homulle authored at least 12 papers between 2015 and 2019.

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Bibliography

2019
Benefits and Challenges of Designing Cryogenic CMOS RF Circuits for Quantum Computers.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

2018
Cryo-CMOS Circuits and Systems for Quantum Computing Applications.
IEEE J. Solid State Circuits, 2018

2017
Cryogenic CMOS interfaces for quantum devices.
Proceedings of the 7th IEEE International Workshop on Advances in Sensors and Interfaces, 2017

15.5 Cryo-CMOS circuits and systems for scalable quantum computing.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Performance characterization of Altera and Xilinx 28 nm FPGAs at cryogenic temperatures.
Proceedings of the International Conference on Field Programmable Technology, 2017

Nanometer CMOS characterization and compact modeling at deep-cryogenic temperatures.
Proceedings of the 47th European Solid-State Device Research Conference, 2017

Cryo-CMOS Electronic Control for Scalable Quantum Computing: Invited.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
A Cryogenic 1 GSa/s, Soft-Core FPGA ADC for Quantum Computing Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Characterization of bipolar transistors for cryogenic temperature sensors in standard CMOS.
Proceedings of the 2016 IEEE SENSORS, Orlando, FL, USA, October 30 - November 3, 2016, 2016

A 1 GSa/s, Reconfigurable Soft-core FPGA ADC (Abstract Only).
Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2016

CryoCMOS hardware technology a classical infrastructure for a scalable quantum computer.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

2015
200 MS/s ADC implemented in a FPGA employing TDCs.
Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015


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