Hayato Nomura
According to our database1,
Hayato Nomura
authored at least 3 papers
between 2016 and 2018.
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Bibliography
2018
Proceedings of the 4th IEEE World Forum on Internet of Things, 2018
A two-stage-pipeline CPU of SH-2 architecture implemented on FPGA and SoC for IoT, edge AI and robotic applications.
Proceedings of the 2018 IEEE Symposium in Low-Power and High-Speed Chips, 2018
2016
Proceedings of the 34th IEEE International Conference on Computer Design, 2016