Fumio Arakawa

According to our database, Fumio Arakawa authored at least 25 papers between 1990 and 2022.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2022

Special Issue on Cool Chips.

Makoto Ikeda, Fumio Arakawa

IEEE Micro, 2022

2020

Foreword.

Fumio Arakawa, Makoto Ikeda

IEICE Trans. Electron., 2020

2018

A two-stage-pipeline CPU of SH-2 architecture implemented on FPGA and SoC for IoT, edge AI and robotic applications.

Kesami Hagiwara, Tomoichi Hayashi, Shumpei Kawasaki, Fumio Arakawa, Oleg Endo, Hayato Nomura, Akira Tsukamoto, Duong Nguyen, Binh Nguyen, Anh Tran, Hoan Hyunh, Ikuo Kudoh, Cong-Kha Pham

Proceedings of the 2018 IEEE Symposium in Low-Power and High-Speed Chips, 2018

2016

Parallel Design of Feedback Control Systems Utilizing Dead Time for Embedded Multicore Processors.

Yuta Suzuki, Kota Sata, Junichi Kako, Kohei Yamaguchi, Fumio Arakawa, Masato Edahiro

IEICE Trans. Electron., 2016

Message from the program committee chairs.

Makoto Ikeda, Fumio Arakawa

Proceedings of the 2016 IEEE Symposium in Low-Power and High-Speed Chips, 2016

2014

Simple One-to-One Architecture for Parallel Execution of Embedded Control Systems.

Riku Nakamura, Fumio Arakawa, Masato Edahiro

Proceedings of the 2014 IEEE International Conference on Cyber-Physical Systems, 2014

Parallel design of control systems utilizing dead time for embedded multicore processors.

Yuta Suzuki, Kota Sata, Junichi Kako, Kohei Yamaguchi, Fumio Arakawa, Masato Edahiro

Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

Establishing a standard interface between multi-manycore and software tools - SHIM.

Masaki Kondo, Fumio Arakawa, Masato Edahiro

Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

Panel discussions: Toward wearable computing era, how COOL chip architecture and tools will evolve?

Fumio Arakawa

Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

2011

Cool Chips.

Makoto Ikeda, Fumio Arakawa

IEEE Micro, 2011

2009

Guest Editors' Introduction: Cool Chips.

Makoto Ikeda, Fumio Arakawa

IEEE Micro, 2009

An embedded processor core for consumer appliances with 5.6 GFLOPS and 73M polygons/s FPU.

Fumio Arakawa, Takashi Okada, Tomoichi Hayashi, Osamu Nishii, Toshihiro Hattori

Microprocess. Microsystems, 2009

2006

Development of processor cores for digital consumer appliances.

Fumio Arakawa, Tetsuya Yamada, Takashi Okada, Makoto Ishikawa, Yuki Kondo, Motokazu Ozawa, Tomoyuki Kodama, Osamu Nishii, Toshihiro Hattori, Tatsuya Kamei, Junichi Nishimoto, Shinichi Yoshioka

Syst. Comput. Jpn., 2006

SH-X: An embedded processor core for consumer appliances.

Fumio Arakawa, Makoto Ishikawa, Yuki Kondo, Tatsuya Kamei, Osamu Nishii, Toshihiro Hattori

J. Embed. Comput., 2006

Reducing Consuming Clock Power Optimization of a 90 nm Embedded Processor Core.

Tetsuya Yamada, Masahide Abe, Yusuke Nitta, Kenji Ogura, Manabu Kusaoke, Makoto Ishikawa, Motokazu Ozawa, Kiwamu Takada, Fumio Arakawa, Osamu Nishii, Toshihiro Hattori

IEICE Trans. Electron., 2006

2005

SH-X: an embedded processor core for consumer appliances.

Fumio Arakawa, Makoto Ishikawa, Yuki Kondo, Tatsuya Kamei, Motokazu Ozawa, Osamu Nishii, Toshihiro Hattori

SIGARCH Comput. Archit. News, 2005

A 4500 MIPS/W, 86 µA Resume-Standby, 11 µA Ultra-Standby Application Processor for 3G Cellular Phones.

Makoto Ishikawa, Tatsuya Kamei, Yuki Kondo, Masanao Yamaoka, Yasuhisa Shimazaki, Motokazu Ozawa, Saneaki Tamaki, Mikio Furuyama, Tadashi Hoshi, Fumio Arakawa, Osamu Nishii, Kenji Hirose, Shinichi Yoshioka, Toshihiro Hattori

IEICE Trans. Electron., 2005

An Exact Leading Non-Zero Detector for a Floating-Point Unit.

Fumio Arakawa, Tomoichi Hayashi, Masakazu Nishibori

IEICE Trans. Electron., 2005

Low-Power Design of 90-nm SuperH Processor Core.

Tetsuya Yamada, Masahide Abe, Yusuke Nitta, Kenji Ogura, Manabu Kusaoke, Makoto Ishikawa, Motokazu Ozawa, Kiwamu Takada, Fumio Arakawa, Osamu Nishii, Toshihiro Hattori

Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

2004

Transparent SOC: on-chip analyzing techniques and implementation for embedded processor.

Makoto Saen, Motohiro Nakagawa, Junichi Nishimoto, Tomoyuki Kodama, Fumio Arakawa

Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

2000

SH-5: The 64-Bit SuperH Architecture.

Prasenjit Biswas, Atsushi Hasegawa, Srinivas Mandaville, Mark Debbage, Andy Sturges, Fumio Arakawa, Yasuhiko Saito, Kunio Uchiyama

IEEE Micro, 2000

1998

SH4 RISC multimedia microprocessor.

Fumio Arakawa, Osamu Nishii, Kunio Uchiyama, Norio Nakagawa

IEEE Micro, 1998

1993

The Gmicro/500 superscalar microprocessor with branch buffers.

Kunio Uchiyama, Fumio Arakawa, Susumu Narita, Hirokazu Aoki, Ikuya Kawasaki, Shigezumi Matsui, Mitsuyoshi Yamamoto, Norio Nakagawa, Ikuo Kudo

IEEE Micro, 1993

Design Methodology for GMICRO^TM/500 TRON Microprocessor.

Susumu Narita, Fumio Arakawa, Kunio Uchiyama, Ikuya Kawasaki

Proceedings of the Proceedings 1993 International Conference on Computer Design: VLSI in Computers & Processors, 1993

1990

An analysis of the aliasing probability of multiple-input signature registers in the case of a 2^m-ary symmetric channel.

Kazuhiko Iwasaki, Fumio Arakawa

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990