Hector Sanchez

According to our database1, Hector Sanchez authored at least 11 papers between 1994 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Stress, Test, and Simulation of Analog IOs on Automotive ICs.
Proceedings of the IEEE International Test Conference, 2020

2015
Fault Diagnosis of an Advanced Wind Turbine Benchmark Using Interval-Based ARRs and Observers.
IEEE Trans. Ind. Electron., 2015

1999
A versatile 3.3/2.5/1.8-V CMOS I/O driver built in a 0.2-μm, 3.5-nm Tox, 1.8-V CMOS technology.
IEEE J. Solid State Circuits, 1999

A 450-MHz RISC microprocessor with enhanced instruction set and copper interconnect.
IEEE J. Solid State Circuits, 1999

1997
A 250-MHz 5-W PowerPC microprocessor with on-chip L2 cache controller.
IEEE J. Solid State Circuits, 1997

Thermal management system for high performance PowerPC™ microprocessors.
Proceedings of the Proceedings IEEE COMPCON 97, 1997

1996
A Scalable Resistor-less PLL Design for PowerPCTM Microprocessors.
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996

1995
A wide-bandwidth low-voltage PLL for PowerPC microprocessors.
IEEE J. Solid State Circuits, April, 1995

1994
A 2.2 W, 80 MHz superscalar RISC microprocessor.
IEEE J. Solid State Circuits, December, 1994

PowerPC 603, A Microprocessor for Portable Computers.
IEEE Des. Test Comput., 1994

The PowerPC 603 Microprocessor: A Low-Power Design for Portable Applications.
Proceedings of the Spring COMPCON 94, Digest of Papers, San Francisco, California, USA, February 28, 1994


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