Hidehiro Asai

According to our database, Hidehiro Asai authored at least 5 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Temperature Dependent Variations of Low-Frequency Noise Sources in Cryogenic Short-Channel Bulk MOSFETs.

Takumi Inaba, Hiroshi Oka, Hidehiro Asai, Hiroshi Fuketa, Shota Iizuka, Kimihiko Kato, Shunsuke Shitakata, Koichi Fukuda, Takahiro Mori

IEEE Access, 2024

2023

Origin of Low-Frequency Noise in Si n-MOSFET at Cryogenic Temperatures: The Effect of Interface Quality.

Hiroshi Oka, Takumi Inaba, Shunsuke Shitakata, Kimihiko Kato, Shota Iizuka, Hidehiro Asai, Hiroshi Fuketa, Takahiro Mori

IEEE Access, 2023

Determining the low-frequency noise source in cryogenic operation of short-channel bulk MOSFETs.

Takumi Inaba, Hiroshi Oka, Hidehiro Asai, Hiroshi Fuketa, Shota Iizuka, Kimihiko Kato, Shunsuke Shitakata, Koichi Fukuda, Takahiro Mori

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2022

Effect of Conduction Band Edge States on Coulomb-Limiting Electron Mobility in Cryogenic MOSFET Operation.

Hiroshi Oka, Takumi Inaba, Shota Iizuka, Hidehiro Asai, Kimihiko Kato, Takahiro Mori

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2021

Buried nanomagnet realizing high-speed/low-variability silicon spin qubits: implementable in error-correctable large-scale quantum computers.

Shota Iizuka, Kimihiko Kato, Atsushi Yagishita, Hidehiro Asai, Tetsuya Ueda, Hiroshi Oka, Junichi Hattori, Tsutomu Ikegami, Koichi Fukuda, Takahiro Mori

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021