Hirotomo Ishii

According to our database1, Hirotomo Ishii authored at least 8 papers between 2005 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2020
An Automotive LiDAR SoC for 240 × 192-Pixel 225-m-Range Imaging With a 40-Channel 0.0036-mm<sup>2</sup> Voltage/Time Dual-Data-Converter-Based AFE.
IEEE J. Solid State Circuits, 2020

5.1 A 240×192 Pixel 10fps 70klux 225m-Range Automotive LiDAR SoC Using a 40ch 0.0036mm<sup>2</sup> Voltage/Time Dual-Data-Converter-Based AFE.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2019
Digital Amplifier: A Power-Efficient and Process-Scaling Amplifier for Switched Capacitor Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2019

2018
A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 240 × 96 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC.
IEEE J. Solid State Circuits, 2018

A 20ch TDC/ADC hybrid SoC for 240×96-pixel 10%-reflection <0.125%-precision 200m-range imaging LiDAR with smart accumulation technique.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
28.7 A 0.7V 12b 160MS/s 12.8fJ/conv-step pipelined-SAR ADC in 28nm CMOS with digital amplifier technique.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2016
A power-scalable zero-crossing-based amplifier using inverter-based zero-crossing detector with CMFB.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2005
A 1.0 V 40mW 10b 100MS/s pipeline ADC in 90nm CMOS.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005


  Loading...