Naoyuki Kawabe

According to our database, Naoyuki Kawabe authored at least 11 papers between 2000 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2018

A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 240 × 96 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC.

Kentaro Yoshioka, Hiroshi Kubota, Tomonori Fukushima, Satoshi Kondo, Tuan Thanh Ta, Hidenori Okuni, Kaori Watanabe, Masatoshi Hirono, Yoshinari Ojima, Katsuyuki Kimura, Sohichiroh Hosoda, Yutaka Ota, Tomohiro Koizumi, Naoyuki Kawabe, Yasuhiro Ishii, Yoichiro Iwagami, Seitaro Yagi, Isao Fujisawa, Nobuo Kano, Tomohiko Sugimoto, Daisuke Kurose, Naoya Waki, Yumi Higashi, Tetsuya Nakamura, Yoshikazu Nagashima, Hirotomo Ishii, Akihide Sai, Nobu Matsumoto

IEEE J. Solid State Circuits, 2018

A 20ch TDC/ADC hybrid SoC for 240×96-pixel 10%-reflection <0.125%-precision 200m-range imaging LiDAR with smart accumulation technique.

Kentaro Yoshioka, Hiroshi Kubota, Tomonori Fukushima, Satoshi Kondo, Tuan Thanh Ta, Hidenori Okuni, Kaori Watanabe, Yoshinari Ojima, Katsuyuki Kimura, Sohichiroh Hosoda, Yutaka Ota, Tomohiro Koizumi, Naoyuki Kawabe, Yasuhiro Ishii, Yoichiro Iwagami, Seitaro Yagi, Isao Fujisawa, Nobuo Kano, Tomohiro Sugimoto, Daisuke Kurose, Naoya Waki, Yumi Higashi, Tetsuya Nakamura, Yoshikazu Nagashima, Hirotomo Ishii, Akihide Sai, Nobu Matsumoto

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2007

An automated runtime power-gating scheme.

Mototsugu Hamada, Takeshi Kitahara, Naoyuki Kawabe, Hironori Sato, Tsuyoshi Nishikawa, Takayoshi Shimazawa, Takahiro Yamashita, Hiroyuki Hara, Yukihito Oowaki

Proceedings of the 25th International Conference on Computer Design, 2007

2006

A 63-mW H.264/MPEG-4 audio/visual codec LSI with module-wise dynamic Voltage/frequency scaling.

Toshihide Fujiyoshi, Shinichiro Shiratake, Shuou Nomura, Tsuyoshi Nishikawa, Yoshiyuki Kitasho, Hideho Arakida, Yuji Okuda, Yoshiro Tsuboi, Mototsugu Hamada, Hiroyuki Hara, Tetsuya Fujita, Fumitoshi Hatori, Takayoshi Shimazawa, Kunihiko Yahagi, Hideki Takeda, Masami Murakata, Fumihiro Minami, Naoyuki Kawabe, Takeshi Kitahara, Katsuhiro Seta, Masafumi Takahashi, Yukihito Oowaki, Tohru Furuyama

IEEE J. Solid State Circuits, 2006

2005

Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction.

Takeshi Kitahara, Naoyuki Kawabe, Fumihiro Minami, Katsuhiro Seta, Toshiyuki Furusawa

Proceedings of the 2005 Design, 2005

A conditional clocking flip-flop for low power H.264/MPEG-4 audio/visual codec LSI.

Mototsugu Hamada, Hiroyuki Hara, Tetsuya Fujita, Chen Kong Teh, Takayoshi Shimazawa, Naoyuki Kawabe, Takeshi Kitahara, Yu Kikuchi, Tsuyoshi Nishikawa, Makoto Takahashi, Yukihito Oowaki

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2002

Code Coverage-Based Power Estimation Techniques for Microprocessors.

Gang Qu, Naoyuki Kawabe, Kimiyoshi Usami, Miodrag Potkonjak

J. Circuits Syst. Comput., 2002

Selective Multi-Threshold Technique for High-Performance and Low-Standby Applications.

Kimiyoshi Usami, Naoyuki Kawabe, Masayuki Koizumi, Katsuhiro Seta, Toshiyuki Furusawa

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

Automated selective multi-threshold design for ultra-low standby applications.

Kimiyoshi Usami, Naoyuki Kawabe, Masayuki Koizumi, Katsuhiro Seta, Toshiyuki Furusawa

Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002

2000

Function-level power estimation methodology for microprocessors.

Gang Qu, Naoyuki Kawabe, Kimiyoshi Usami, Miodrag Potkonjak

Proceedings of the 37th Conference on Design Automation, 2000

Low-power technique for on-chip memory using biased partitioning and access concentration.

Naoyuki Kawabe, Kimiyoshi Usami

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000