Nobu Matsumoto

According to our database1, Nobu Matsumoto authored at least 18 papers between 1990 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2020
An Automotive LiDAR SoC for 240 × 192-Pixel 225-m-Range Imaging With a 40-Channel 0.0036-mm<sup>2</sup> Voltage/Time Dual-Data-Converter-Based AFE.
IEEE J. Solid State Circuits, 2020


5.1 A 240×192 Pixel 10fps 70klux 225m-Range Automotive LiDAR SoC Using a 40ch 0.0036mm<sup>2</sup> Voltage/Time Dual-Data-Converter-Based AFE.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2019
Inter-Frame Smart-Accumulation Technique for Long-Range and High-Pixel Resolution LiDAR.
Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2019

2018
A 20-ch TDC/ADC Hybrid Architecture LiDAR SoC for 240 × 96 Pixel 200-m Range Imaging With Smart Accumulation Technique and Residue Quantizing SAR ADC.
IEEE J. Solid State Circuits, 2018

A 20ch TDC/ADC hybrid SoC for 240×96-pixel 10%-reflection <0.125%-precision 200m-range imaging LiDAR with smart accumulation technique.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

Data selection and de-noising based on reliability for long-range and high-pixel resolution LiDAR.
Proceedings of the 2018 IEEE Symposium in Low-Power and High-Speed Chips, 2018

2013
A near-future prediction method for low power consumption on a many-core processor.
Proceedings of the Design, Automation and Test in Europe, 2013

2010
A new compilation technique for SIMD code generation across basic block boundaries.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009
Design and implementation of scalable, transparent threads for multi-core media processor.
Proceedings of the Design, Automation and Test in Europe, 2009

2007
Generation of Pack Instruction Sequence for Media Processors Using Multi-Valued Decision Diagram.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

2006
Pack instruction generation for media pUsing multi-valued decision diagram.
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006

2003
A single-chip MPEG-2 codec based on customizable media embedded processor.
IEEE J. Solid State Circuits, 2003

2002
Design Methodology and System for a Configurable Media Embedded Processor Extensible to VLIW Architecture.
Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

A single-chip MPEG-2 codec based on customizable media microprocessor.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001
A New Verification Methodology for Complex Pipeline Behavior.
Proceedings of the 38th Design Automation Conference, 2001

1993
A Compaction Method for Full Chip VLSI Layouts.
Proceedings of the 30th Design Automation Conference. Dallas, 1993

1990
Datapath Generator Based on Gate-Level Symbolic Layout.
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990


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