Huan Yu

Orcid: 0000-0003-4772-0163

According to our database1, Huan Yu authored at least 9 papers between 2017 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Online presence:

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Bibliography

2020
A Bit-Time-Dependent Model of I/O Drivers for Overclocking Analysis.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Behavioral Modeling of Tunable I/O Drivers With Preemphasis Including Power Supply Noise.
IEEE Trans. Very Large Scale Integr. Syst., 2020

2019
Repeater Insertion to Reduce Delay and Power in Copper and Carbon Nanotube-Based Nanointerconnects.
IEEE Access, 2019

Modeling of Voltage-Controlled Oscillators Including I/O Behavior Using Augmented Neural Networks.
IEEE Access, 2019

Behavioral Modeling of Pre-emphasis Drivers Including Power Supply Noise Using Neural Networks.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

Behavioral Modeling of Tunable I/O Drivers with Pre-emphasis Using Neural Networks.
Proceedings of the 20th International Symposium on Quality Electronic Design, 2019

A Spectral Convolutional Net for Co-Optimization of Integrated Voltage Regulators and Embedded Inductors.
Proceedings of the International Conference on Computer-Aided Design, 2019

2018
Polynomial Chaos modeling for jitter estimation in high-speed links.
Proceedings of the IEEE International Test Conference, 2018

2017
Investigation of surface roughness effects for D-band SIW transmission lines on LCP substrate.
Proceedings of the 2017 IEEE Radio and Wireless Symposium, 2017


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