Arvind Singh
Orcid: 0000-0001-5238-7196
According to our database1,
Arvind Singh
authored at least 46 papers
between 2013 and 2022.
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Bibliography
2022
IEEE Trans. Ind. Electron., 2022
2021
Consistent Long-Term Monthly Coastal Wetland Vegetation Monitoring Using a Virtual Satellite Constellation.
Remote. Sens., 2021
IEEE Internet Things J., 2021
2020
Architecture, Chip, and Package Codesign Flow for Interposer-Based 2.5-D Chiplet Integration Enabling Heterogeneous IP Reuse.
IEEE Trans. Very Large Scale Integr. Syst., 2020
An Inductive Voltage Regulator With Overdrive Tracking Across Input Voltage in Cascoded Power Stage.
IEEE Trans. Circuits Syst., 2020
Wetland Dynamics Inferred from Spectral Analyses of Hydro-Meteorological Signals and Landsat Derived Vegetation Indices.
Remote. Sens., 2020
Enhanced Power and Electromagnetic SCA Resistance of Encryption Engines via a Security-Aware Integrated All-Digital LDO.
IEEE J. Solid State Circuits, 2020
Proceedings of the IEEE PES Innovative Smart Grid Technologies Europe, 2020
Repetitive Learning Frequency Control for Energy Intensive Corporate Microgrids subject to Cyclic Batch Loads.
Proceedings of the IEEE PES Innovative Smart Grid Technologies Europe, 2020
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020
A Configurable Dual-Mode PRINCE Cipher with Security Aware Pipelining in 65nm for High Throughput Applications.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020
A Fully Synthesized Integrated Buck Regulator with Auto-generated GDS-II in 65nm CMOS Process.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020
2019
Autotuning of Integrated Inductive Voltage Regulator Using On-Chip Delay Sensor to Tolerate Process and Passive Variations.
IEEE Trans. Very Large Scale Integr. Syst., 2019
IEEE Trans. Educ., 2019
Improved Power/EM Side-Channel Attack Resistance of 128-Bit AES Engines With Random Fast Voltage Dithering.
IEEE J. Solid State Circuits, 2019
IEEE Internet Things J., 2019
A 128b AES Engine with Higher Resistance to Power and Electromagnetic Side-Channel Attacks Enabled by a Security-Aware Integrated All-Digital Low-Dropout Regulator.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
Automatic GDSII Generator for On-Chip Voltage Regulator for Easy Integration in Digital SoCs.
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019
On the Effect of NBTI Induced Aging of Power Stage on the Transient Performance of On-Chip Voltage Regulators.
Proceedings of the IEEE International Reliability Physics Symposium, 2019
Proceedings of the International Joint Conference on Neural Networks, 2019
A Spectral Convolutional Net for Co-Optimization of Integrated Voltage Regulators and Embedded Inductors.
Proceedings of the International Conference on Computer-Aided Design, 2019
Extracting Side-Channel Leakage from Round Unrolled Implementations of Lightweight Ciphers.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019
Mitigating Power Supply Glitch based Fault Attacks with Fast All-Digital Clock Modulation Circuit.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Architecture, Chip, and Package Co-design Flow for 2.5D IC Design Enabling Heterogeneous IP Reuse.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
2018
Assessing the Resilience of Coastal Wetlands to Extreme Hydrologic Events Using Vegetation Indices: A Review.
Remote. Sens., 2018
Reducing Power Side-Channel Information Leakage of AES Engines Using Fully Integrated Inductive Voltage Regulator.
IEEE J. Solid State Circuits, 2018
Int. J. Commun. Syst., 2018
Blindsight: Blinding EM Side-Channel Leakage using Built-In Fully Integrated Inductive Voltage Regulator.
CoRR, 2018
Stochastic Multi-path Routing Problem with Non-stationary Rewards: Building PayU's Dynamic Routing.
Proceedings of the Companion of the The Web Conference 2018 on The Web Conference 2018, 2018
Energy efficient and side-channel secure hardware architecture for lightweight cipher SIMON.
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Performance based tuning of an inductive integrated voltage regulator driving a digital core against process and passive variations.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
An All-Digital Fully Integrated Inductive Buck Regulator With A 250-MHz Multi-Sampled Compensator and a Lightweight Auto-Tuner in 130-nm CMOS.
IEEE J. Solid State Circuits, 2017
Reducing Side-Channel Leakage of Encryption Engines Using Integrated Low-Dropout Voltage Regulators.
J. Hardw. Syst. Secur., 2017
8.1 Improved power-side-channel-attack resistance of an AES-128 core via a security-aware integrated buck voltage regulator.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
Invited paper: Low power requirements and side-channel protection of encryption engines: Challenges and opportunities.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017
Improved power side channel attack resistance of a 128-bit AES engine with random fast voltage dithering.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017
2016
A Simulation Tool for Examining the Effect of Communications on Disaster Response in the Oil and Gas Industry.
IEEE Trans. Syst. Man Cybern. Syst., 2016
Exploiting Fully Integrated Inductive Voltage Regulators to Improve Side Channel Resistance of Encryption Engines.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016
Proceedings of the 34th IEEE International Conference on Computer Design, 2016
Integrated all-digital low-dropout regulator as a countermeasure to power attack in encryption engines.
Proceedings of the 2016 IEEE International Symposium on Hardware Oriented Security and Trust, 2016
An integrated inductive VR with a 250MHz all-digital multisampled compensator and on-chip auto-tuning of coefficients in 130nm CMOS.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016
2015
Exploring power attack protection of resource constrained encryption engines using integrated low-drop-out regulators.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
Proceedings of the IEEE First International Smart Cities Conference, 2015
2013
Reduction techniques in modelling critical infrastructures under the infrastructure interdependencies simulator framework.
Int. J. Crit. Infrastructures, 2013