Indranil Palit

According to our database1, Indranil Palit authored at least 17 papers between 2009 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
Mining and Fusing Productivity Metrics with Code Quality Information at Scale.
Proceedings of the IEEE International Conference on Software Maintenance and Evolution, 2023

Automatic Refactoring Candidate Identification Leveraging Effective Code Representation.
Proceedings of the IEEE International Conference on Software Maintenance and Evolution, 2023

2019
Application-level Studies of Cellular Neural Network-based Hardware Accelerators.
CoRR, 2019

A Uniform Modeling Methodology for Benchmarking DNN Accelerators.
Proceedings of the International Conference on Computer-Aided Design, 2019

2018
Biomedical Image Segmentation Using Fully Convolutional Networks on TrueNorth.
Proceedings of the 31st IEEE International Symposium on Computer-Based Medical Systems, 2018

2015
Analytically Modeling Power and Performance of a CNN System.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

TFET-based Operational Transconductance Amplifier Design for CNN Systems.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

A CNN-inspired mixed signal processor based on tunnel transistors.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
Understanding the landscape of accelerators for vision.
Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Architectural impacts of emerging transistors.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

Cellular neural networks for image analysis using steep slope devices.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Impact of steep-slope transistors on non-von Neumann architectures: CNN case study.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
TFET-based cellular neural network architectures.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

Systematic design of nanomagnet logic circuits.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
Scalable and Parallel Boosting with MapReduce.
IEEE Trans. Knowl. Data Eng., 2012

2010
Parallelized Boosting with Map-Reduce.
Proceedings of the ICDMW 2010, 2010

2009
Differential Predictive Modeling for Racial Disparities in Breast Cancer.
Proceedings of the 2009 IEEE International Conference on Bioinformatics and Biomedicine, 2009


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