Inhyuk Choi

Orcid: 0000-0002-8928-9765

According to our database1, Inhyuk Choi authored at least 19 papers between 2011 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
P2Cache: An Application-Directed Page Cache for Improving Performance of Data-Intensive Applications.
Proceedings of the 15th ACM/USENIX Workshop on Hot Topics in Storage and File Systems, 2023

Integrated Host-SSD Mapping Table Management for Improving User Experience of Smartphones.
Proceedings of the 21st USENIX Conference on File and Storage Technologies, 2023

2022
Alohomora: protecting files from ransomware attacks using fine-grained I/O whitelisting.
Proceedings of the HotStorage '22: 14th ACM Workshop on Hot Topics in Storage and File Systems, Virtual Event, June 27, 2022

2020
Analysis of Thermal Sensitivity by High Voltage Insulator Materials.
IEEE Access, 2020

2018
Test Resource Reused Debug Scheme to Reduce the Post-Silicon Debug Cost.
IEEE Trans. Computers, 2018

2017
An On-Chip Error Detection Method to Reduce the Post-Silicon Debug Time.
IEEE Trans. Computers, 2017

DRAM-Based Error Detection Method to Reduce the Post-Silicon Debug Time for Multiple Identical Cores.
IEEE Trans. Computers, 2017

Test item priority estimation for high parallel test efficiency under ATE debug time constraints.
Proceedings of the International Test Conference in Asia, 2017

2016
Parallelized Network-on-Chip-Reused Test Access Mechanism for Multiple Identical Cores.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

A TSV test structure for simultaneously detecting resistive open and bridge defects in 3D-ICs.
Proceedings of the International SoC Design Conference, 2016

Process variation-aware bridge fault analysis.
Proceedings of the International SoC Design Conference, 2016

Software-based embedded core test using multi-polynomial for test data reduction.
Proceedings of the International SoC Design Conference, 2016

A new online test and debug methodology for automotive camera image processing system.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

Test access mechaism for stack test time reduction of 3-dimensional integrated circuit.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2015
Majority-Based Test Access Mechanism for Parallel Testing of Multiple Identical Cores.
IEEE Trans. Very Large Scale Integr. Syst., 2015

2014
A novel test access mechanism for parallel testing of multi-core system.
IEICE Electron. Express, 2014

A Scalable and Parallel Test Access Strategy for NoC-Based Multicore System.
Proceedings of the 23rd IEEE Asian Test Symposium, 2014

2013
Bit transmission error correction scheme for FlexRay based automotive communication systems.
Proceedings of the IEEE 2nd Global Conference on Consumer Electronics, 2013

2011
Path search engine for fast optimal path search using efficient hardware architecture.
Proceedings of the International SoC Design Conference, 2011


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