Sungyoul Seo

Orcid: 0000-0001-9469-758X

According to our database1, Sungyoul Seo authored at least 13 papers between 2015 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
Reduced-Pin-Count BOST for Test-Cost Reduction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

2019
An Efficient BIRA Utilizing Characteristics of Spare Pivot Faults.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2018
A Statistic-Based Scan Chain Reordering for Energy-Quality Scalable Scan Test.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

2-D Failure Bitmap Compression Using Line Fault Marking Method.
Proceedings of the International SoC Design Conference, 2018

2017
Off-chip test architecture for improving multi-site testing efficiency using tri-state decoder and 3V-level encoder.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

Broadcast scan compression based on deterministic pattern generation algorithm.
Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

An efficient built-in self-repair scheme for area reduction.
Proceedings of the International SoC Design Conference, 2017

2016
Tri-State Coding Using Reconfiguration of Twisted Ring Counter for Test Data Compression.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

A test methodology to screen scan-path failures.
Proceedings of the International SoC Design Conference, 2016

Software-based embedded core test using multi-polynomial for test data reduction.
Proceedings of the International SoC Design Conference, 2016

2015
A scan shifting method based on clock gating of multiple groups for low power scan testing.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

Low power scan bypass technique with test data reduction.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

Scan Chain Reordering-Aware X-Filling and Stitching for Scan Shift Power Reduction.
Proceedings of the 24th IEEE Asian Test Symposium, 2015


  Loading...