Jaehong Kim

Affiliations:
  • Samsung Electronics, Hwaseong, Korea


According to our database1, Jaehong Kim authored at least 13 papers between 2004 and 2018.

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Bibliography

2018
A flash memory controller for 15μs ultra-low-latency SSD using high-speed 3D NAND flash with 3μs read time.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2013
Modulation coding for flash memories.
Proceedings of the International Conference on Computing, Networking and Communications, 2013

2012
Verify level control criteria for multi-level cell flash memories and their applications.
EURASIP J. Adv. Signal Process., 2012

Low-cost, low-power and high-throughput BCH decoder for NAND Flash Memory.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2009
The design of efficiently-encodable rate-compatible LDPC codes - [transactions papers].
IEEE Trans. Commun., 2009

2007
The Design of Efficiently-Encodable Rate-Compatible LDPC Codes
CoRR, 2007

2006
The Design of Rate-Compatible Structured Low-Density Parity-Check Codes.
PhD thesis, 2006

Rate-compatible punctured low-density parity-check codes with short block lengths.
IEEE Trans. Inf. Theory, 2006

Design of Rate-Compatible Irregular LDPC Codes for Incremental Redundancy Hybrid ARQ Systems.
Proceedings of the Proceedings 2006 IEEE International Symposium on Information Theory, 2006

Design of Efficiently-Encodable Rate-Compatible Irregular LDPC Codes.
Proceedings of IEEE International Conference on Communications, 2006

2005
Rate-compatible punctured low-density parity-check codes for ultra wide band systems.
Proceedings of the Global Telecommunications Conference, 2005. GLOBECOM '05, St. Louis, Missouri, USA, 28 November, 2005

2004
Rate-Compatible Puncturing of Low-Density Parity-Check Codes.
IEEE Trans. Inf. Theory, 2004

Puncturing for finite length low-density parity-check codes.
Proceedings of the 2004 IEEE International Symposium on Information Theory, 2004


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