Jun Jin Kong

According to our database1, Jun Jin Kong authored at least 11 papers between 2000 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2021
A 16-GB 640-GB/s HBM2E DRAM With a Data-Bus Window Extension Technique and a Synergetic On-Die ECC Scheme.
IEEE J. Solid State Circuits, 2021

2020

2018
Efficient decoding of block turbo codes.
J. Commun. Networks, 2018

2016
A post-processing algorithm for reducing strong error effects in NAND flash memory.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2013
Modulation coding for flash memories.
Proceedings of the International Conference on Computing, Networking and Communications, 2013

2012
Verify level control criteria for multi-level cell flash memories and their applications.
EURASIP J. Adv. Signal Process., 2012

Error control coding and signal processing for flash memories.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2004
Low-latency architectures for high-throughput rate Viterbi decoders.
IEEE Trans. Very Large Scale Integr. Syst., 2004

2003
Interleaved Convolutional Code and Its Viterbi Decoder Architecture.
EURASIP J. Adv. Signal Process., 2003

2002
High-speed add-compare-select units using locally self-resetting CMOS.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2000
A modified two-step SOVA-based turbo decoder with a fixed scaling factor.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000


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