Kijun Lee
According to our database1,
Kijun Lee
authored at least 6 papers
between 2012 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2023
A 16 GB 1024 GB/s HBM3 DRAM With Source-Synchronized Bus Design and On-Die Error Control Scheme for Enhanced RAS Features.
IEEE J. Solid State Circuits, 2023
2022
A 16 GB 1024 GB/s HBM3 DRAM with On-Die Error Control Scheme for Enhanced RAS Features.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
2021
2020
22.1 A 1.1V 16GB 640GB/s HBM2E DRAM with a Data-Bus Window-Extension Technique and a Synergetic On-Die ECC Scheme.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2016
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012