James H. Aylor

According to our database1, James H. Aylor authored at least 54 papers between 1979 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Hybrid Knowledge and Data Driven Synthesis of Runtime Monitors for Cyber-Physical Systems.
IEEE Trans. Dependable Secur. Comput., 2024

2021
Data-driven Design of Context-aware Monitors for Hazard Prediction in Artificial Pancreas Systems.
Proceedings of the 51st Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2021

2009
Body Area Sensor Networks: Challenges and Opportunities.
Computer, 2009

2006
Antialiasing Encoder Interface With Sub-Nyquist Sampling.
IEEE Trans. Instrum. Meas., 2006

Special Issue Introduction: The IEEE Computer Society's 60th Anniversary.
Computer, 2006

2005
Advances in Modelling and Simulation of Large Parallel/distributed Systems.
Parallel Process. Lett., 2005

2004
System Lifetime Optimization for Heterogeneous Sensor Networks with a Hub-Spoke Topology.
IEEE Trans. Mob. Comput., 2004

2003
Teaching computer design using virtual prototyping.
IEEE Trans. Educ., 2003

A Proposed Modeling Environment to Teach Performance Modeling and Hardware/Software Codesign to Senior Undergraduates.
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003

Performance-Based System Design Education.
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003

2002
EIC's Message: It has been a Great Ride!
Computer, 2002

The End of Computing Disciplines as We Know Them?
Computer, 2002

2001
Performance Modeling of Hierarchical Crossbar-Based Multicomputer Systems.
IEEE Trans. Computers, 2001

Interfaces for mixed-level simulation with sequential elements.
J. Syst. Archit., 2001

Keep on Keepin' on.
Computer, 2001

Can We Work Together?
Computer, 2001

2000
Dynamic Access Ordering for Streamed Computations.
IEEE Trans. Computers, 2000

New Computer Departments Reflect our Changing Industry.
Computer, 2000

System level testability analysis using Petri nets.
Proceedings of the IEEE International High-Level Design Validation and Test Workshop 2000, 2000

1999
Performance Modeling and Analysis in VHDL.
Proceedings of the VLSI Handbook., 1999

Resolving unknown inputs in mixed-level simulation with sequential elements.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Computer for the 21st Century.
Computer, 1999

Access Order and Effective Bandwidth for Streams on a Direct Rambus Memory.
Proceedings of the Fifth International Symposium on High-Performance Computer Architecture, 1999

1998
Smarter Memory: Improving Bandwidth for Streamed References.
Computer, 1998

A Top-Down Design Environment for Developing Pipelined Datapaths.
Proceedings of the 35th Conference on Design Automation, 1998

1997
An undergraduate advanced computer design course using virtual-prototyping.
Proceedings of the 1997 IEEE International Conference on Microelectronic Systems Education, 1997

An Integrated Design Environment for Performance and Dependability Analysis.
Proceedings of the 34st Conference on Design Automation, 1997

1996
An analysis of fault partitioned parallel test generation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996

An analysis of fault partitioning algorithms for fault partitioned ATPG.
Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Design and Evaluation of Dynamic Access Ordering Hardware.
Proceedings of the 10th international conference on Supercomputing, 1996

1995
Refinement of system-level designs using hybrid modeling.
Proceedings of the 1st IEEE International Conference on Engineering of Complex Computer Systems (ICECCS '95), 1995

1994
Object-Oriented Techniques in Hardware Design.
Computer, 1994

Digital Circuit Testing on a Network of Workstations.
Proceedings of the 1994 International Conference on Parallel Processing, 1994

Experimental Implementation of Dynamic Access Ordering.
Proceedings of the 27th Annual Hawaii International Conference on System Sciences (HICSS-27), 1994

1993
Implementation-Independent Model of an Instruction Set Architecture in VHDL.
IEEE Des. Test Comput., 1993

A Framework for Hardware / Software Codesign.
Computer, 1993

Combinational circuit ATPG using binary decision diagrams.
Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993

Parallelization methods for circuit partitioning based parallel automatic test pattern generation.
Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993

Workstation Based Parallel Test Generation.
Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1992
A battery state-of-charge indicator for electric wheelchairs.
IEEE Trans. Ind. Electron., 1992

Parallel-Processing Techniques for Automatic Test Pattern Generation.
Computer, 1992

A novel VHDL-based computer architecture design methodology.
Proceedings of the Third International Workshop on Rapid System Prototyping, 1992

The Future of Embedded System Design.
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

1991
The Promise of the Next Decade (Guest Editors' Introduction).
Computer, 1991

Implementation-Independent Model of an Instruction Set Architecture Using VHDL.
Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991

1990
Concurrent testing of VLSI circuits using conservative logic.
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

Compacting randomly generated test sets.
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

1989
Uninterpreted modeling using the VHSIC hardware description language (VHDL).
Proceedings of the 1989 IEEE International Conference on Computer-Aided Design, 1989

1988
The VHSIC Hardware Description Language (IEEE Standard 1076): Language Features Revisited.
Proceedings of the COMPCON'88, Digest of Papers, Thirty-Third IEEE Computer Society International Conference, San Francisco, California, USA, February 29, 1988

Reliability and safety analysis in medical applications of computer technology.
Proceedings of the First Annual IEEE Symposium on Computer-Based Medical Systems (CBMS'88), 1988

1986
Structured Design for Testability in Semicustom VLSI.
IEEE Micro, 1986

VHDL - Feature Description and Analysis.
IEEE Des. Test, 1986

1981
The Impact of Microcomputers on Devices to Aid the Handicapped.
Computer, 1981

1979
Microcomputer-Aided Eating for the Severely Handicapped.
Computer, 1979


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