Jean Michel Daga

According to our database, Jean Michel Daga authored at least 20 papers between 1995 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2010

A statistical design method for Giga Bit memory arrays and beyond.

Christian Caillat, Eric Carman, Jean Michel Daga, Cedric Ouvrard, Philippe Bauser

Proceedings of the 17th IEEE International Conference on Electronics, 2010

2009

A SPICE-Like 2T-FLOTOX Core-Cell Model for Defect Injection and Faulty Behavior Prediction in eFlash.

Olivier Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel

J. Electron. Test., 2009

2008

Hierarchical Code Correction and Reliability Management in Embedded nor Flash Memories.

Benoît Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli

Proceedings of the 13th European Test Symposium, 2008

2007

Retention and Reliability Problems in Embedded Flash Memories: Analysis and Test of Defective 2T-FLOTOX Tunnel Window.

Olivier Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel

Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

A concurrent approach for testing address decoder faults in eFlash memories.

Olivier Ginez, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Jean Michel Daga

Proceedings of the 2007 IEEE International Test Conference, 2007

Electrical Simulation Model of the 2T-FLOTOX Core-Cell for Defect Injection and Faulty Behavior Prediction in eFlash Memories.

Olivier Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel

Proceedings of the 12th European Test Symposium, 2007

Architecture for Highly Reliable Embedded Flash Memories.

Benoît Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli

Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), 2007

Evaluation of design for reliability techniques in embedded flash memories.

Benoît Godard, Jean Michel Daga, Lionel Torres, Gilles Sassatelli

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

An Overview of Failure Mechanisms in Embedded Flash Memories.

Olivier Ginez, Jean Michel Daga, Marylene Combe, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel

Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

2005

A PMOS-switch based charge pump, allowing lost cost implementation on a CMOS standard process.

Emmanuel Racape, Jean Michel Daga

Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004

Embedded EEPROM Speed Optimization Using System Power Supply Resources.

Jean Michel Daga, Caroline Papaix, Marylene Combe, Emmanuel Racape, Vincent Sialelli

Proceedings of the Integrated Circuit and System Design, 2004

2003

Design Techniques for EEPROMs Embedded in Portable Systems on Chips.

Jean Michel Daga, Caroline Papaix, Marc Merandat, Stephane Ricard, Giuseppe Medulla, Jeanine Guichaoua, Daniel Auvergne

IEEE Des. Test Comput., 2003

A 40ns Random Access Time Low Voltage 2Mbits EEPROM Memory for Embedded Applications.

Jean Michel Daga, Caroline Papaix, Emmanuel Racape, Marylene Combe, Vincent Sialelli, Jeanine Guichaoua

Proceedings of the 11th IEEE International Workshop on Memory Technology, 2003

2002

A New Single Ended Sense Amplifier for Low Voltage Embedded EEPROM Non Volatile Memories.

Caroline Papaix, Jean Michel Daga

Proceedings of the 10th IEEE International Workshop on Memory Technology, 2002

Test and Repair of Embedded Flash Memories.

Jean Michel Daga

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

2000

Design Techniques for Embedded EEPROM Memories in Portable ASIC and ASSP Solutions.

Jean Michel Daga, Caroline Papaix, Marc Merandat, Stephane Ricard, Giuseppe Medulla, Jeanine Guichaoua, Daniel Auvergne

Proceedings of the 8th IEEE International Workshop on Memory Technology, 2000

1999

A comprehensive delay macro modeling for submicrometer CMOS logics.

Jean Michel Daga, Daniel Auvergne

IEEE J. Solid State Circuits, 1999

1998

Temperature Effect on Delay for Low Voltage Applications.

Jean Michel Daga, E. Ottaviano, Daniel Auvergne

Proceedings of the 1998 Design, 1998

1997

Internal power modelling and minimization in CMOS inverters.

S. Turgis, Jean Michel Daga, Josep M. Portal, Daniel Auvergne

Proceedings of the European Design and Test Conference, 1997

1995

Delay modelling improvement for low voltage applications.

Jean Michel Daga, Michel Robert, Daniel Auvergne

Proceedings of the Proceedings EURO-DAC'95, 1995