Jean-Michel Reynes

According to our database, Jean-Michel Reynes authored at least 5 papers between 2003 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2019

Development of SiC MOSFET Electrical Model and Experimental Validation: Improvement and Reduction of Parameter Number.

Quang Chuc Nguyen, Patrick Tounsi, Jean-Pierre Fradin, Jean-Michel Reynes

Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

2013

Estimation of power MOSFET junction temperature during avalanche mode: Experimental tests and modelling.

Toufik Azoui, Patrick Tounsi, Jean-Marie Dorkel, Jean-Michel Reynes, Jean-Luc Massol, E. Pomes

Microelectron. Reliab., 2013

2008

Switching performance of 65 V vertical N-channel FLYMOSFETs.

L. Théolier, Karine Isoird, H. Tranduc, Frederic Morancho, Jaume Roig, Yann Weber, Evgueniy N. Stefanov, Jean-Michel Reynes

Microelectron. J., 2008

2007

Characterisation of P floating islands for 150-200 V FLYMOSFETs.

Yann Weber, Jaume Roig, Jean-Michel Reynes, Frederic Morancho, Evgueniy N. Stefanov, Monique Dilhan, Gérard Sarrabayrouse

IET Circuits Devices Syst., 2007

2003

Copper metallization influence on power MOS reliability.

Adeline Feybesse, Ivana Deram, Jean-Michel Reynes, Eric Moreau

Microelectron. Reliab., 2003