Ji-Eun Jang
According to our database1,
Ji-Eun Jang
authored at least 10 papers
between 2009 and 2015.
Collaborative distances:
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Bibliography
2015
PPV-Based Modeling and Event-Driven Simulation of Injection-Locked Oscillators in SystemVerilog.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
2014
PPV-based modeling and event-driven simulation of injection-locked oscillators in SystemVerilog.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
2013
An event-driven simulation methodology for integrated switching power supplies in SystemVerilog.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
2012
True event-driven simulation of analog/mixed-signal behaviors in SystemVerilog: A decision-feedback equalizing (DFE) receiver example.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012
2011
Comparator-based switched-capacitor pipelined ADC with background offset calibration.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
A pipelined analog-to-digital converter using incomplete-settling-without-slewing technique.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
High-bandwidth power-scalable 10-bit pipelined ADC using bandwidth-reconfigurable operational amplifier.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009