Yung-Pin Lee

According to our database1, Yung-Pin Lee authored at least 22 papers between 1995 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2011
SHA-Less Pipelined ADC With In Situ Background Clock-Skew Calibration.
IEEE J. Solid State Circuits, 2011

Camera-Based Cosmetic Platform to Measure Microcirculation and Skin Condition of Faces.
Proceedings of the Second International Conference on Innovations in Bio-inspired Computing and Applications, 2011

A Novel and Low-Cost Cosmetic Chip Using 4x4 Array Photoplethysmography.
Proceedings of the Second International Conference on Innovations in Bio-inspired Computing and Applications, 2011

What's Happening to Our Body after Drinking Coke? The Characteristic of the Blood Pressure Wave in Radial Artery.
Proceedings of the Second International Conference on Innovations in Bio-inspired Computing and Applications, 2011

Removement of the Three Minutes Irritating Music Produced No Incremental Relaxation.
Proceedings of the Second International Conference on Innovations in Bio-inspired Computing and Applications, 2011

The Sustained Exhilarating Cardiac Responses after Listening to the Very Fast and Complex Rhythm.
Proceedings of the Second International Conference on Innovations in Bio-inspired Computing and Applications, 2011

A Pre- and Post-bond Self-Testing and Calibration Methodology for SAR ADC Array in 3-D CMOS Imager.
Proceedings of the 16th European Test Symposium, 2011

CMOS comparator for medical imaging.
Proceedings of the 4th International Conference on Biomedical Engineering and Informatics, 2011

A self-testing and calibration method for embedded successive approximation register ADC.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
A pipelined analog-to-digital converter using incomplete-settling-without-slewing technique.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

High-bandwidth power-scalable 10-bit pipelined ADC using bandwidth-reconfigurable operational amplifier.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

SHA-less pipelined ADC converting 10th Nyquist band with in-situ clock-skew calibration.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
A 600MS/s 30mW 0.13µm CMOS ADC array achieving over 60dB SFDR with adaptive digital equalization.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

Subharmonically injection-locked PLLs for ultra-low-noise clock generation.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2008
A 1.5 bit 5<sup>th</sup> order CT/DT delta sigma class D amplifier with power efficiency improvement.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Feed-Forward Pulse Width Modulation for High Line Regulation Buck or Boost Converters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

1998
A Low Power 2-D DCT Chip Design Using Direct 2-D Algorithm.
Proceedings of the ASP-DAC '98, 1998

1997
A cost-effective architecture for 8×8 two-dimensional DCT/IDCT using direct method.
IEEE Trans. Circuits Syst. Video Technol., 1997

A flexible data-interlacing architecture for full-search block-matching algorithm.
Proceedings of the 1997 International Conference on Application-Specific Systems, 1997

1996
A pseudo-object-oriented very low bit-rate video coding system with cache VQ for detail compensation.
Proceedings of the Proceedings 1996 International Conference on Image Processing, 1996

Building a pseudo object-oriented very low bit-rate video coding system from a modified optical flow motion estimation algorithm.
Proceedings of the 1996 IEEE International Conference on Acoustics, 1996

1995
A new block-matching criterion for motion estimation and its implementation.
IEEE Trans. Circuits Syst. Video Technol., 1995


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