Jianyi Yu

According to our database1, Jianyi Yu authored at least 5 papers between 2021 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2023
An 8-T Processing-in-Memory SRAM Cell-Based Pixel-Parallel Array Processor for Vision Chips.
IEEE Trans. Circuits Syst. I Regul. Pap., November, 2023

An Edge Neuromorphic Hardware With Fast On-Chip Error-Triggered Learning on Compressive Sensed Spikes.
IEEE Trans. Circuits Syst. II Express Briefs, July, 2023

2022
A Lightweight Spiking GAN Model for Memristor-centric Silicon Circuit with On-chip Reinforcement Adversarial Learning.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

TEDOP: A Tiny Event-Driven Neural Network Hardware Core Enabling On-Chip Spike-Driven Synaptic Plasticity.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

2021
A Heterogeneous Spiking Neural Network for Computationally Efficient Face Recognition.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021


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