Jin-Aeon Lee

According to our database1, Jin-Aeon Lee authored at least 13 papers between 1998 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2013
72.5GFLOPS 240Mpixel/s 1080p 60fps multi-format video codec application processor enabled with GPGPU for fused multimedia application.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

2009
Integrated Noise Modeling for Image Sensor Using Bayer Domain Images.
Proceedings of the Computer Vision/Computer Graphics Collaboration Techniques, 2009

2007
Subjective Image-Quality Estimation Based on Psychophysical Experimentation.
Proceedings of the Advances in Image and Video Technology, Second Pacific Rim Symposium, 2007

2006
A cost-effective VLSI architecture for anisotropic texture filtering in limited memory bandwidth.
IEEE Trans. Very Large Scale Integr. Syst., 2006

An SoC with 1.3 gtexels/s 3-D graphics full pipeline for consumer applications.
IEEE J. Solid State Circuits, 2006

Contrast Enhancement Using Adaptively Modified Histogram Equalization.
Proceedings of the Advances in Image and Video Technology, First Pacific Rim Symposium, 2006

Color Image Enhancement Using the Laplacian Pyramid.
Proceedings of the Advances in Multimedia Information Processing, 2006

2003
Winscale: an image-scaling algorithm using an area pixel model.
IEEE Trans. Circuits Syst. Video Technol., 2003

2001
A hardware cost minimized fast Phong shader.
IEEE Trans. Very Large Scale Integr. Syst., 2001

SPAF: Sub-texel Precision Anisotropic Filtering.
Proceedings of the 2001 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, 2001

2000
SPARP: a single pass antialiased rasterization processor.
Comput. Graph., 2000

Single-Pass Full-Screen Hardware Accelerated Antialiasing.
Proceedings of the 2000 ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, 2000

1998
A minimized hardware architecture of fast Phong shader using Taylor series approximation in 3D graphics.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998


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