Jingyun Gu
Orcid: 0009-0006-9175-8598
According to our database1,
Jingyun Gu authored at least 8 papers
between 2018 and 2026.
Collaborative distances:
Collaborative distances:
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Bibliography
2026
A 442.42 TOPS/W RRAM-based Digital Computing-in-Memory Accelerator for BF16×1-bit Vision Transformer.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2026
A 24.46TOPS/W and 3.04TOPS/mm<sup>2</sup> BF16×1-bit CIM-based BERT Accelerator in 28nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2026
2025
OPAMP-Free Ferroelectric Capacitive Computing-in-Memory Accelerator for Energy-Efficient Binary Neural Networks.
Proceedings of the 38th IEEE International System-on-Chip Conference, 2025
Proceedings of the 2025 International Symposium on Physical Design, 2025
A 20.98TOPS/W Energy-Efficient Binary BERT Model on Group Vector Systolic CIM Accelerator.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2025
2023
World Wide Web (WWW), July, 2023
2021
Cost risk analysis for instance recommendation in a sustainable Cloud-cyber-physical system framework.
Softw. Pract. Exp., 2021
2018
Proceedings of the Algorithms and Architectures for Parallel Processing, 2018