Yang Zhao

Orcid: 0000-0001-8023-1551

Affiliations:
  • Georgia Institute of Technology, Atlanta, GA, USA
  • Rice University, Department of Electrical and Computer Engineering, Houston, TX, USA (PhD)
  • Fudan University, State Key Laboratory of ASIC and Systems, Shanghai, China (former)


According to our database1, Yang Zhao authored at least 29 papers between 2013 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2023
SmartDeal: Remodeling Deep Network Weights for Efficient Inference and Training.
IEEE Trans. Neural Networks Learn. Syst., October, 2023

EyeCoD: Eye Tracking System Acceleration via FlatCam-Based Algorithm and Hardware Co-Design.
IEEE Micro, 2023

3D-Carbon: An Analytical Carbon Modeling Tool for 3D and 2.5D Integrated Circuits.
CoRR, 2023

Instant-3D: Instant Neural Radiance Field Training Towards On-Device AR/VR 3D Reconstruction.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023

ViTCoD: Vision Transformer Acceleration via Dedicated Algorithm and Accelerator Co-Design.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

Instant-NeRF: Instant On-Device Neural Radiance Field Training via Algorithm-Accelerator Co-Designed Near-Memory Processing.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
e-G2C: A 0.14-to-8.31 µJ/Inference NN-based Processor with Continuous On-chip Adaptation for Anomaly Detection and ECG Conversion from EGM.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

i-FlatCam: A 253 FPS, 91.49 µJ/Frame Ultra-Compact Intelligent Lensless Camera for Real-Time and Efficient Eye Tracking in VR/AR.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

EyeCoD: eye tracking system acceleration via flatcam-based algorithm & accelerator co-design.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

NASA: Neural Architecture Search and Acceleration for Hardware Inspired Hybrid Networks.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

RT-NeRF: Real-Time On-Device Neural Radiance Fields Towards Immersive AR/VR Rendering.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

2021
Practical Attacks on Deep Neural Networks by Memory Trojaning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

HW-NAS-Bench: Hardware-Aware Neural Architecture Search Benchmark.
CoRR, 2021

SmartDeal: Re-Modeling Deep Network Weights for Efficient Inference and Training.
CoRR, 2021

2-in-1 Accelerator: Enabling Random Precision Switch for Winning Both Adversarial Robustness and Efficiency.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

HW-NAS-Bench: Hardware-Aware Neural Architecture Search Benchmark.
Proceedings of the 9th International Conference on Learning Representations, 2021

2020
FracTrain: Fractionally Squeezing Bit Savings Both Temporally and Spatially for Efficient DNN Training.
Proceedings of the Advances in Neural Information Processing Systems 33: Annual Conference on Neural Information Processing Systems 2020, 2020

A New MRAM-Based Process In-Memory Accelerator for Efficient Neural Network Training with Floating Point Precision.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

SmartExchange: Trading Higher-cost Memory Storage/Access for Lower-cost Computation.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

Timely: Pushing Data Movements And Interfaces In Pim Accelerators Towards Local And In Time Domain.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architectures.
Proceedings of the 2020 IEEE International Conference on Acoustics, 2020

AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs.
Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

2019
E2-Train: Energy-Efficient Deep Network Training with Data-, Model-, and Algorithm-Level Saving.
CoRR, 2019

E2-Train: Training State-of-the-art CNNs with Over 80% Energy Savings.
Proceedings of the Advances in Neural Information Processing Systems 32: Annual Conference on Neural Information Processing Systems 2019, 2019

Live Demonstration: Bringing Powerful Deep Learning into Daily-Life Devices (Mobiles and FPGAs) Via Deep k-Means.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Memory Trojan Attack on Neural Network Accelerators.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2016
An All-Digital Gigahertz Class-S Transmitter in a 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2016

2015
An all-digital quadrature RF transmitter with 8-bit ΣΔ modulation.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2013
Design of a time-interleaved band-pass ΣΔ modulator for Class-S power amplifier.
Proceedings of the IEEE 10th International Conference on ASIC, 2013


  Loading...