Joel Grodstein

According to our database, Joel Grodstein authored at least 21 papers between 1990 and 2011.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2011

Test Vector Generation for Post-Silicon Delay Testing Using SAT-Based Decision Problems.

Desta Tadesse, R. Iris Bahar, Joel Grodstein

J. Electron. Test., 2011

2009

AutoRex: An automated post-silicon clock tuning tool.

Desta Tadesse, Joel Grodstein, R. Iris Bahar

Proceedings of the 2009 IEEE International Test Conference, 2009

2008

Fast Measurement of the "Non-Deterministic Zone" in Microprocessor Debug Using Maximum Likelihood Estimation.

Desta Tadesse, R. Iris Bahar, Joel Grodstein

Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

2007

Accurate timing analysis using SAT and pattern-dependent delay models.

Desta Tadesse, D. Sheffield, E. Lenge, R. Iris Bahar, Joel Grodstein

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

Timing analysis for full-custom circuits using symbolic DC formulations.

Hui-Yuan Song, Kundan Nepal, R. Iris Bahar, Joel Grodstein

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

2005

Symbolic failure analysis of complex CMOS circuits due to excessive leakage current and charge sharing.

R. Iris Bahar, Hui-Yuan Song, Kundan Nepal, Joel Grodstein

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

2004

RESTA: a robust and extendable symbolic timing analysis tool.

Kundan Nepal, Hui-Yuan Song, R. Iris Bahar, Joel Grodstein

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

2003

Symbolic Failure Analysis of Custom Circuits due to Excessive Leakage Current.

Hui-Yuan Song, S. Bohidar, R. Iris Bahar, Joel Grodstein

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

Automatic Generation of Critical-Path Tests for a Partial-Scan Microprocessor.

Joel Grodstein, Dilip K. Bhavsar, Vijay Bettada, Richard A. Davies

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

2002

Timing Analysis for Full-Custom Circuits Using Symbolic DC Formulations.

Hui-Yuan Song, R. Iris Bahar, Joel Grodstein

Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU.

Joel Grodstein, Rachid Rayess, Tad Truex, Linda Shattuck, Sue Lowell, Dan Bailey, David Bertucci, Gabriel P. Bischoff, Daniel E. Dever, Mike Gowan, Roy Lane, Brian Lilly, Krishna Nagalla, Rahul Shah, Emily Shriver, Shi-Huang Yin, Shannon V. Morton

Proceedings of the 12th ACM Great Lakes Symposium on VLSI 2002, 2002

1998

A low-cost, 300-MHz, RISC CPU with attached media processor.

Sribalan Santhanam, Allen J. Baum, David Bertucci, Mike Braganza, Kevin Broch, Todd Broch, James Burnette, Edward Chang, Kwong-Tak Chui, Dan Dobberpuhl, Paul M. Donahue, Joel Grodstein, Insung Kim, Daniel Murray, Mark H. Pearce, Amy Silveria, Dave Souydalay, Aaron Spink, Robert Stepanian, Anand Varadharajan, Vincent R. von Kaenel, Ricky Wen

IEEE J. Solid State Circuits, 1998

Static race verification for networks with reconvergent clocks.

Joel Grodstein, Nick Rethman, Nevine Nassif

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

1997

Logic decomposition during technology mapping.

Eric Lehman, Yosinori Watanabe, Joel Grodstein, Heather Harkness

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1995

A delay model for logic synthesis of continuously-sized networks.

Joel Grodstein, Eric Lehman, Heather Harkness, Bill Grundmann, Yosinori Watanabe

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

1994

Optimal latch mapping and retiming within a tree.

Joel Grodstein, Eric Lehman, Heather Harkness, Hervé J. Touati, Bill Grundmann

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993

A simple algorithm for fanout optimization using high-performance buffer libraries.

K. Kodandapani, Joel Grodstein, Antun Domic, Hervé J. Touati

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

1991

Automatic Detection of MOS Synchronizers for Timing Verification.

Joel Grodstein, Nick Rethman, Rahul Razdan, Gabriel P. Bischoff

Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

Timing Verification on a 1.2M-Device Full-Custom CMOS Design.

Jengwei Pan, Larry L. Biro, Joel Grodstein, William J. Grundmann, Yao-Tsung Yen

Proceedings of the 28th Design Automation Conference, 1991

1990

Constraint Identification for Timing Verification.

Joel Grodstein, Jengwei Pan, William J. Grundmann, Bruce Gieseke, Yao-Tsung Yen

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

Race Detection for Two-Phase Systems.

Joel Grodstein, Jim Montanaro, Susanne Marino

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990