R. Iris Bahar
Orcid: 0000-0001-6927-8527
According to our database1,
R. Iris Bahar
authored at least 134 papers
between 1994 and 2024.
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Bibliography
2024
2023
Proceedings of the 16th International Joint Conference on Biomedical Engineering Systems and Technologies, 2023
2022
HybriDS: Cache-Conscious Concurrent Data Structures for Near-Memory Processing Architectures.
Proceedings of the SPAA '22: 34th ACM Symposium on Parallelism in Algorithms and Architectures, Philadelphia, PA, USA, July 11, 2022
Proceedings of the 2022 IEEE International Symposium on Secure and Private Execution Environment Design (SEED), 2022
EDAML 2022 Invited Speaker 3: Scalable ML Architectures for Real-time Energy-efficient Computing.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Proceedings of the IEEE High Performance Extreme Computing Conference, 2022
Hardware Acceleration of Nonparametric Belief Propagation for Efficient Robot Manipulation.
Proceedings of the FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022, 2022
2021
CoRR, 2021
Proceedings of the IEEE International Test Conference, 2021
2020
Workshops on Extreme Scale Design Automation (ESDA) Challenges and Opportunities for 2025 and Beyond.
CoRR, 2020
IEEE Comput. Archit. Lett., 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Hardware Acceleration of Monte-Carlo Sampling for Energy Efficient Robust Robot Manipulation.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020
2019
IEEE Trans. Emerg. Top. Comput., 2019
J. Electron. Test., 2019
Conference Reports: Recap of the 37th Edition of the International Conference on Computer-Aided Design (ICCAD 2018).
IEEE Des. Test, 2019
Proceedings of the 37th IEEE VLSI Test Symposium, 2019
Concurrent Data Structures with Near-Data-Processing: an Architecture-Aware Implementation.
Proceedings of the 31st ACM on Symposium on Parallelism in Algorithms and Architectures, 2019
Proceedings of the International Symposium on Memory Systems, 2019
GRIP: Generative Robust Inference and Perception for Semantic Robot Manipulation in Adversarial Environments.
Proceedings of the 2019 IEEE/RSJ International Conference on Intelligent Robots and Systems, 2019
Proceedings of the IEEE International Symposium on Workload Characterization, 2019
Proceedings of the 26th IEEE International Conference on Electronics, Circuits and Systems, 2019
Proceedings of the Tenth International Green and Sustainable Computing Conference, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
A Sub-Threshold Noise Transient Simulator Based on Integrated Random Telegraph and Thermal Noise Modeling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Towards the Simulation Based Design and Validation of Mobile Robotic Cyber-Physical Systems.
J. Low Power Electron., 2018
Int. J. Parallel Program., 2018
Conference Reports: Report on the 2017 International Conference on Computer-Aided Design (ICCAD).
IEEE Des. Test, 2018
Robust object estimation using generative-discriminative inference for secure robotics applications.
Proceedings of the International Conference on Computer-Aided Design, 2018
2017
ACM Trans. Embed. Comput. Syst., 2017
A Research Tool for the Power and Performance Analysis of Sensor-Based Mobile Robots.
Proceedings of the New Generation of CAS, 2017
Comprehensive comparison of gradient-based cross-spectral stereo matching generated disparity maps.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017
Understanding the impact of precision quantization on the accuracy and energy of neural networks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
Proceedings of the 25th IEEE North Atlantic Test Workshop, 2016
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016
Hardware acceleration of feature detection and description algorithms on low-power embedded platforms.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016
Thrifty-malloc: A HW/SW codesign for the dynamic management of hardware transactional memory in embedded multicore systems.
Proceedings of the 2016 International Conference on Compilers, 2016
2015
Introduction to the Special Issue on Reliable, Resilient, and Robust Design of Circuits and Systems.
ACM Trans. Design Autom. Electr. Syst., 2015
Energy-Efficient and High-Performance Lock Speculation Hardware for Embedded Multicore Systems.
ACM Trans. Embed. Comput. Syst., 2015
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Proceedings of the 10th IEEE International Conference on Networking, 2015
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
Playing with Fire: Transactional Memory Revisited for Error-Resilient and Energy-Efficient MPSoC Execution.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
A Simulation Framework for Analyzing Transient Effects Due to Thermal Noise in Sub-Threshold Circuits.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015
2014
Fast Design Exploration for Performance, Power and Accuracy Tradeoffs in FPGA-Based Accelerators.
ACM Trans. Reconfigurable Technol. Syst., 2014
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014
ABACUS: A technique for automated behavioral synthesis of approximate computing circuits.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
2013
"Scaling" the impact of EDA education Preliminary findings from the CCC workshop series on extreme scale design automation.
Proceedings of the 2013 IEEE International Conference on Microelectronic Systems Education, 2013
Proceedings of the International Symposium on Quality Electronic Design, 2013
Transparent and energy-efficient speculation on NUMA architectures for embedded MPSoCs.
Proceedings of the 1st International Workshop on Many-core Embedded Systems 2013, 2013
Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013
2012
ACM Trans. Design Autom. Electr. Syst., 2012
J. Electron. Test., 2012
A noise-immune sub-threshold circuit design based on selective use of Schmitt-trigger logic.
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012
High Performance Parallel JPEG2000 Streaming Decoder Using GPGPU-CPU Heterogeneous System.
Proceedings of the 23rd IEEE International Conference on Application-Specific Systems, 2012
2011
Test Vector Generation for Post-Silicon Delay Testing Using SAT-Based Decision Problems.
J. Electron. Test., 2011
Proceedings of the 29th IEEE VLSI Test Symposium, 2011
Proceedings of the IEEE 9th Symposium on Application Specific Processors, 2011
Proceedings of the 12th Latin American Test Workshop, 2011
Proceedings of the 16th European Test Symposium, 2011
SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs.
Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011
2010
Temperature-Insensitive Dual- V<sub>th</sub> Synthesis for Nanometer CMOS Technologies Under Inverse Temperature Dependence.
IEEE Trans. Very Large Scale Integr. Syst., 2010
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010
Microelectron. J., 2010
Embedded-TM: Energy and complexity-effective hardware transactional memory for embedded multicore systems.
J. Parallel Distributed Comput., 2010
Proceedings of the High Performance Embedded Architectures and Compilers, 2010
Numerical queue solution of thermal noise-induced soft errors in subthreshold CMOS devices.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
Improving the testability and reliability of sequential circuits with invariant logic.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010
2009
ACM J. Emerg. Technol. Comput. Syst., 2009
Proceedings of the 2009 IEEE International Test Conference, 2009
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, 2009
Proceedings of the ACM/SIGDA 17th International Symposium on Field Programmable Gate Arrays, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
2008
J. Low Power Electron., 2008
ACM J. Emerg. Technol. Comput. Syst., 2008
Introduction to joint ACM JETC/TODAES special issue on new, emerging, and specialized technologies.
ACM J. Emerg. Technol. Comput. Syst., 2008
Fast Measurement of the "Non-Deterministic Zone" in Microprocessor Debug Using Maximum Likelihood Estimation.
Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008
Proceedings of the 2008 IEEE International Test Conference, 2008
Reducing leakage power by accounting for temperature inversion dependence in dual-Vt synthesized circuits.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
2007
A hardware/software framework for supporting transactional memory in a MPSoC environment.
SIGARCH Comput. Archit. News, 2007
J. Electron. Test., 2007
Proceedings of the 2007 IEEE International Symposium on Nanoscale Architectures, 2007
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Interactive presentation: Techniques for designing noise-tolerant multi-level combinational circuits.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006
IEEE Micro, 2006
Proceedings of the SPAA 2006: Proceedings of the 18th Annual ACM Symposium on Parallelism in Algorithms and Architectures, Cambridge, Massachusetts, USA, July 30, 2006
Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
A cost-effective implementation of an ECC-protected instruction queue for out-of-order microprocessors.
Proceedings of the 43rd Design Automation Conference, 2006
2005
Symbolic failure analysis of complex CMOS circuits due to excessive leakage current and charge sharing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
IEEE Des. Test Comput., 2005
Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005
Proceedings of the 42nd Design Automation Conference, 2005
2004
IEEE Trans. Very Large Scale Integr. Syst., 2004
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Reducing Issue Queue Power for Multimedia Applications using a Feedback Control Algorithm.
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004
2003
A Dynamically Reconfigurable Mixed In-Order/Out-of-Order Issue Queue for Power-Aware Microprocessors.
Proceedings of the 2003 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2003), 2003
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
Proceedings of the 40th Design Automation Conference, 2003
Combining Software and Hardware Monitoring for Improved Power and Performance Tuning.
Proceedings of the 7th Annual Workshop on Interaction between Compilers and Computer Architecture (INTERACT-7 2003), 2003
2002
Timing Analysis for Full-Custom Circuits Using Symbolic DC Formulations.
Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002
2001
Proceedings of the 28th Annual International Symposium on Computer Architecture, 2001
2000
Power optimization of technology-dependent circuits based on symbolic computation of logic implications.
ACM Trans. Design Autom. Electr. Syst., 2000
Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors.
Proceedings of the Power-Aware Computer Systems, First International Workshop, 2000
1999
SIGARCH Comput. Archit. News, 1999
The Non-Critical Buffer: Using Load Latency Tolerance to Improve Data Cache Efficiency.
Proceedings of the IEEE International Conference On Computer Design, 1999
1998
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998
1997
Symbolic timing analysis and resynthesis for low power of combinational circuits containing false paths.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997
1996
Symbolic computation of logic implications for technology-dependent low-power synthesis.
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996
1995
CMOS dynamic power estimation based on collapsible current source transistor modeling.
Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995
Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995
Proceedings of the 32st Conference on Design Automation, 1995
1994
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994
Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994