Jun Luo
Orcid: 0000-0002-5122-6806Affiliations:
- Chinese Academy of Sciences, Institute of Microelectronics, Beijing, China
According to our database1,
Jun Luo authored at least 11 papers
between 2015 and 2026.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2026
Improved uniformity and performance of GAAFETs via full bottom dielectric isolation and quasi-self-aligned landing pads.
Microelectron. J., 2026
Microelectron. J., 2026
An energy-efficient digital computing-in-memory STT-MRAM macro for AdderNets with optimized addition operations.
IEICE Electron. Express, 2026
2025
Microelectron. J., 2025
A high bit rate and self-stable probability true random number generator based on magnetic tunnel junction for IoT security applications.
IEICE Electron. Express, 2025
2024
ACM Trans. Multim. Comput. Commun. Appl., July, 2024
2023
First Demonstration of a Design Methodology for Highly Reliable Operation at High Temperature on 128kb 1T1C FeRAM Chip.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
2020
An Improved Dimensional Measurement Method of Staircase Patterns With Higher Precision in 3D NAND.
IEEE Access, 2020
2016
Microelectron. Reliab., 2016
2015
Proceedings of the 10th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, 2015
Comparison of decoupling resistors and capacitors for increasing the single event upset resistance of SRAM cells.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015