Jianfeng Gao

According to our database, Jianfeng Gao authored at least 11 papers between 2020 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

An energy-efficient digital computing-in-memory STT-MRAM macro for AdderNets with optimized addition operations.

Yuan Xue, Sinan Zou, Jianfeng Gao, Yilu Li, Yan Cui, Jun Luo

IEICE Electron. Express, 2026

2025

A high bit rate and self-stable probability true random number generator based on magnetic tunnel junction for IoT security applications.

Sinan Zou, Xing Zhao, Yuan Xue, Jianfeng Gao, Yilu Li, Yan Cui, Jun Luo

IEICE Electron. Express, 2025

2023

Transport mechanism in Hf0.5Zr0.5O2-based ferroelectric diodes.

Haoran Yu, Tiancheng Gong, Peng Yuan, Yuan Wang, Zhaomeng Gao, Xiaoxin Xu, Ying Sun, Ran Cheng, Jianfeng Gao, Junfeng Li, Bing Chen, Qing Luo

Sci. China Inf. Sci., December, 2023

Implementation of 16 Boolean logic operations based on one basic cell of spin-transfer-torque magnetic random access memory.

Yan Huang, Kaihua Cao, Kun Zhang, Jinkai Wang, Kewen Shi, Zuolei Hao, Wenlong Cai, Ao Du, Jialiang Yin, Qing Yang, Junfeng Li, Jianfeng Gao, Chao Zhao, Weisheng Zhao

Sci. China Inf. Sci., June, 2023

A Security-Enhanced, Charge-Pump-Free, ISO14443-A-/ISO10373-6-Compliant RFID Tag With 16.2-μW Embedded RRAM and Reconfigurable Strong PUF.

Qirui Ren, Qiang Huo, Zhisheng Chen, Qi Gao, Yiming Wang, Yiming Yang, Hao Wu, Xiangqu Fu, Xiaoxin Xu, Qing Luo, Jianfeng Gao, Chengying Chen, Xiaojin Zhao, Dengyun Lei, Xinghua Wang, Feng Zhang, Yong Chen, Pui-In Mak

IEEE Trans. Very Large Scale Integr. Syst., February, 2023

First Demonstration of a Design Methodology for Highly Reliable Operation at High Temperature on 128kb 1T1C FeRAM Chip.

Tiancheng Gong, Lihua Xu, Wei Wei, Pengfei Jiang, Peng Yuan, Bowen Nie, Yuanquan Huang, Yuan Wang, Yang Yang, Jianfeng Gao, Junfeng Li, Jun Luo, Lingfei Wang, Jianguo Yang, Qing Luo, Ling Li, Steve S. Chung, Ming Liu

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

16-layer 3D Vertical RRAM with Low Read Latency (18ns), High Nonlinearity (>5000) and Ultra-low Leakage Current (~pA) Self-Selective Cells.

Yaxin Ding, Jianguo Yang, Yu Liu, Jianfeng Gao, Yuan Wang, Pengfei Jiang, Shuxian Lv, Yuting Chen, Boping Wang, Wei Wei, Tiancheng Gong, Kanhao Xue, Qing Luo, Xiangshui Miao, Ming Liu

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

2022

RRAM Computing-in-Memory Using Transient Charge Transferring for Low-Power and Small-Latency AI Edge Inference.

Linfang Wang, Junjie An, Wang Ye, Weizeng Li, Hanghang Gao, Yangu He, Jianfeng Gao, Jinshan Yue, Lingyan Fan, Chunmeng Dou

Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022

2021

Efficient and Robust Nonvolatile Computing-In-Memory Based on Voltage Division in 2T2R RRAM With Input-Dependent Sensing Control.

Linfang Wang, Wang Ye, Chunmeng Dou, Xin Si, Xiaoxin Xu, Jing Liu, Dashan Shang, Jianfeng Gao, Feng Zhang, Yongpan Liu, Meng-Fan Chang, Qi Liu

IEEE Trans. Circuits Syst. II Express Briefs, 2021

Nano-scaled transistor reliability characterization at nano-second regime.

Ran Cheng, Ying Sun, Yiming Qu, Wei Liu, Fanyu Liu, Jianfeng Gao, Nuo Xu, Bing Chen

Sci. China Inf. Sci., 2021

2020

A ReRAM-Based Computing-in-Memory Convolutional-Macro With Customized 2T2R Bit-Cell for AIoT Chip IP Applications.

Fei Tan, Yiming Wang, Yiming Yang, Liran Li, Tian Wang, Feng Zhang, Xinghua Wang, Jianfeng Gao, Yongpan Liu

IEEE Trans. Circuits Syst. II Express Briefs, 2020