Jun-Sik Yoon

According to our database1, Jun-Sik Yoon authored at least 9 papers between 2019 and 2021.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2021
Digital/Analog Performance Optimization of Vertical Nanowire FETs Using Machine Learning.
IEEE Access, 2021

Analysis of TSV-Induced Mechanical Stress and Electrical Noise Coupling in Sub 5-nm Node Nanosheet FETs for Heterogeneous 3D-ICs.
IEEE Access, 2021

2020
A Novel Sub-5-nm Node Dual-Workfunction Folded Cascode Nanosheet FETs for Low Power Mobile Applications.
IEEE Access, 2020

Device Design Guideline of 5-nm-Node FinFETs and Nanosheet FETs for Analog/RF Applications.
IEEE Access, 2020

Comprehensive Analysis of Source and Drain Recess Depth Variations on Silicon Nanosheet FETs for Sub 5-nm Node SoC Application.
IEEE Access, 2020

Neural Approach for Modeling and Optimizing Si-MOSFET Manufacturing.
IEEE Access, 2020

2019
Source/Drain Patterning FinFETs as Solution for Physical Area Scaling Toward 5-nm Node.
IEEE Access, 2019

Bottom Oxide Bulk FinFETs Without Punch-Through-Stopper for Extending Toward 5-nm Node.
IEEE Access, 2019

Punch-Through-Stopper Free Nanosheet FETs With Crescent Inner-Spacer and Isolated Source/Drain.
IEEE Access, 2019


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