Junghyuk Yoon

According to our database, Junghyuk Yoon authored at least 4 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

First Demonstration of Fully Integrated 16 nm Half-Pitch Selector Only Memory (SOM) for Emerging CXL Memory.

Myoungsub Kim, Yooncheol Bae, Jaehyuk Park, Jeongho Yeon, Hyungjoon Shim, Sehyun Jin, Hyunsoo Kim, Sangchul Oh, Gapsok Do, Dongyeol Yun, Hyung Dong Lee, David Ahn, Junghun Lee, Muhui Park, Junghyuk Yoon, Jeongho Yi, Taekseung Kim, Gain Park, Seoungju Chung, Junho Cheon, Sujin Chae, Namkyun Park, Kyunghoon Kim, Dongyean Oh, Jaeyun Yi, Seonyong Cha

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2019

A Reference-Free Temperature-Dependency-Compensating Readout Scheme for Phase-Change Memory Using Flash-ADC-Configured Sense Amplifiers.

Dong-Hwan Jin, Ji-Wook Kwon, Min-Jae Seo, Mi-Young Kim, Min-Chul Shin, Seokjoon Kang, Junghyuk Yoon, Taek-Seung Kim, Seung-Tak Ryu

IEEE J. Solid State Circuits, 2019

2018

A Quasi-Digital Ultra-Fast Capacitor-Less Low-Dropout Regulator Based on Comparator Control for x8 Current Spike of PCRAM Systems.

Sung-Won Choi, Yeunhee Huh, Sang-Hui Park, Kye-Seok Yoon, Jun-Suk Bang, Se-Un Shin, Yong-Min Ju, Yu-Jin Yang, Junghyuk Yoon, Changyong Ahn, Taekseung Kim, Sung-Wan Hong, Gyu-Hyeong Cho

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

2014

A 6-bit drift-resilient readout scheme for multi-level Phase-Change Memory.

Aravinthan Athmanathan, Milos Stanisavljevic, Junho Cheon, Seokjoon Kang, Changyong Ahn, Junghyuk Yoon, Min-Chul Shin, Taekseung Kim, Nikolaos Papandreou, Haris Pozidis, Evangelos Eleftheriou

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014