Junji Yamamoto

According to our database1, Junji Yamamoto authored at least 17 papers between 1995 and 2017.

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Bibliography

2017
Thermal Sensor Circuit Using Thermography for Temperature-Controlled Laser Hyperthermia.
J. Sensors, 2017

2013
Study on supporting technology for operational procedure design of IT systems in cloud-era datacenters.
Proceedings of the 28th Annual ACM Symposium on Applied Computing, 2013

2008
Platform for Load Balancing and Throughput Enhancement with Cognitive Radio.
IEICE Trans. Commun., 2008

2007
Martini: A Network Interface Controller Chip for High Performance Computing with Distributed PCs.
IEEE Trans. Parallel Distributed Syst., 2007

Simulation and Basic Experiment of Inter Radio System Handover for Cognitive Radio.
Proceedings of the IEEE 18th International Symposium on Personal, 2007

2006
Integration of Mobile IPv6 into Mobile Ad-Hoc Network Systems.
Proceedings of the Autonomic Networking, First International IFIP TC6 Conference, 2006

2003
Performance Evaluation of RHiNET-2/NI: A Network Interface for Distributed Parallel Computing Systems.
Proceedings of the 3rd IEEE International Symposium on Cluster Computing and the Grid (CCGrid 2003), 2003

Performance Evaluation of a Prototype of RHiNET-2: A Network-based Distributed Parallel Computing System.
Proceedings of the 21st IASTED International Multi-Conference on Applied Informatics (AI 2003), 2003

2002
Low Latency High Bandwidth Message Transfer Mechanisms for a Network Interface Plugged into a Memory Slot.
Clust. Comput., 2002

Low Latency Communication on DIMMnet-1 Network Interface Plugged into a DIMM Slot.
Proceedings of the 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 2002

2001
RHiNET-3/SW: an 80-Gbit/s high-speed network switch for distributed parallel computing.
Proceedings of the Ninth Symposium on High Performance Interconnects, 2001

2000
On-the-fly Sending: A Low Latency High Bandwidth Message Transfer Mechanism.
Proceedings of the 5th International Symposium on Parallel Architectures, 2000

A Local Area System Network RHinet-1: A Network for High Performance Parallel Computing.
Proceedings of the Ninth IEEE International Symposium on High Performance Distributed Computing, 2000

MEMOnet : Network interface plugged into a memory slot.
Proceedings of the 2000 IEEE International Conference on Cluster Computing (CLUSTER 2000), November 28th, 2000

1999
Performance evaluation of SNAIL: A multiprocessor based on the simple serial synchronized multistage interconnection network architecture.
Parallel Comput., 1999

1997
Shared vs. Snoop: Evaluation of Cache Structure for Single-Chip Multiprocessors.
Proceedings of the Euro-Par '97 Parallel Processing, 1997

1995
A Preprocessing System of the EULASH: An Environment for Efficient use of Multiprocessors with Local Memory.
Proceedings of the Seventh IASTED/ISMM International Conference on Parallel and Distributed Computing and Systems, 1995


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