Junjie Wang
Orcid: 0000-0001-7183-422XAffiliations:
- University of Electronic Science and Technology of China, State Key Laboratory of Electronic Thin Films and Integrated Devices, Chengdu, China
According to our database1,
Junjie Wang
authored at least 16 papers
between 2018 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Design and Implementation of a Hybrid, ADC/DAC-Free, Input-Sparsity-Aware, Precision Reconfigurable RRAM Processing-in-Memory Chip.
IEEE J. Solid State Circuits, February, 2024
Design and implementation of a charge-sharing in-memory-computing macro with sparse feature for quantized neural network.
Microelectron. J., 2024
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
Ultra-High-Speed Accelerator Architecture for Convolutional Neural Network Based on Processing-in-Memory Using Resistive Random Access Memory.
Sensors, March, 2023
An Area- and Energy-Efficient Spiking Neural Network With Spike-Time-Dependent Plasticity Realized With SRAM Processing-in-Memory Macro and On-Chip Unsupervised Learning.
IEEE Trans. Biomed. Circuits Syst., February, 2023
Proceedings of the 32nd USENIX Security Symposium, 2023
FPGA-implemented Memristor-based Transient Chaotic Neural Network for AES Edge Encryption.
Proceedings of the International Conference on Electronics, 2023
A Programmable Logic-in-Memory Architecture Based on 22nm Fully DepletedSilicon on Insulator Technology.
Proceedings of the International Conference on Electronics, 2023
2020
IEEE Trans. Biomed. Circuits Syst., 2020
An energy-efficient deep convolutional neural networks coprocessor for multi-object detection.
Microelectron. J., 2020
2019
A Neuromorphic-Hardware Oriented Bio-Plausible Online-Learning Spiking Neural Network Model.
IEEE Access, 2019
IEEE Access, 2019
IEEE Access, 2019
IEEE Access, 2019
2018
IEEE Access, 2018
Realization of a Power-Efficient Transmitter Based on Integrated Artificial Neural Network.
IEEE Access, 2018