Jyoti Patel

According to our database, Jyoti Patel authored at least 6 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Unveiling Thermal Cross Talk in 5nm Gate-All-Around Stacked Nanosheet FETs: A Machine Learning Perspective.

Vivek Kumar, Nischal Anand, Rohit Rai, Sneha Chauhan, Jyoti Patel

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023

Dronevision: A Dataset of Aerial Videos for Computer Vision Applications.

Dhrumil Patel, Akshara Mehta, Mallikarjun Bhusnoor, Jyoti Patel, Sandeep Sainkar, Ninad Mehendale

Dataset, May, 2023

FEM modeling of gate resistance for 5 nm SGC/DGC Stacked Nanosheet Transistor.

Vivek Kumar, Jyoti Patel, Arnab Datta, Sudeb Dasgupta

Proceedings of the 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems, 2023

2022

Design optimization Using Symmetric/Asymmetric Spacer for 14 nm Multi-Fin Tri-gate Fin-FET for Mid-Band 5G Applications.

Jyoti Patel, Shashank Banchhor, Surila Guglani, Avirup Dasgupta, Sourajeet Roy, Anand Bulusu, Sudeb Dasgupta

Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022

FEM Modeling of Thermal Aspect of Dielectric Inserted Under Source & Drain of 5 nm Nanosheet.

Vivek Kumar, Jyoti Patel, Arnab Datta, Sudeb Dasgupta

Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

2019

Performance improvement of nano wire TFET by hetero-dielectric and hetero-material: At device and circuit level.

Jyoti Patel, Dheeraj Sharma, Shivendra Yadav, Alemienla Lemtur, Priyanka Suman

Microelectron. J., 2019