Kai Hylla
According to our database1,
Kai Hylla
authored at least 10 papers
between 2008 and 2020.
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Bibliography
2020
A Timed-Value Stream Based ESL Timing and Power Estimation and Simulation Framework for Heterogeneous MPSoCs.
Int. J. Parallel Program., 2020
2014
Bridging the gap between precise RT-level power/timing estimation and fast high-level simulation: a method for automatically identifying and characterising combinational macros in synchronous sequential systems at register-transfer level and subsequent executable high-level model generation with respect to non-functional properties.
PhD thesis, 2014
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014
2013
The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration.
Microprocess. Microsystems, 2013
Early Power & Timing Estimation of Custom Hardware Blocks based on Automatically Generated Combinatorial Macros.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013
2012
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
2010
Towards an ESL Framework for Timing and Power Aware Rapid Prototyping of HW/SW Systems.
Proceedings of the 2010 Forum on specification & Design Languages, 2010
2009
Hybrid logical-statistical simulation with thermal and IR-drop mapping for degradation and variation prediction.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
2008
Proceedings of the Languages for Embedded Systems and their Applications, 2008
Proceedings of the Forum on specification and Design Languages, 2008