Philipp A. Hartmann
Orcid: 0000-0003-0150-684X
According to our database1,
Philipp A. Hartmann
authored at least 27 papers
between 2004 and 2020.
Collaborative distances:
Collaborative distances:
Timeline
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Online presence:
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on zbmath.org
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on orcid.org
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on dl.acm.org
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Bibliography
2020
A Timed-Value Stream Based ESL Timing and Power Estimation and Simulation Framework for Heterogeneous MPSoCs.
Int. J. Parallel Program., 2020
2015
Proceedings of the 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2015
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015
2014
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014
2013
The COMPLEX reference framework for HW/SW co-design and power management supporting platform-based design-space exploration.
Microprocess. Microsystems, 2013
Ansatz zur Bewertung der HW/SW-Kommunikation in asymmetrischen Multi-Prozessor-Systemen.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013
Early Power & Timing Estimation of Custom Hardware Blocks based on Automatically Generated Combinatorial Macros.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013
Proceedings of the 16th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2013
2012
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012
Nicht-invasive Simulation des Energieverbrauchs von Hardware-Komponenten auf Systemebene mit SystemC.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2012
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012
2011
Proceedings of the 2011 International Conference on Embedded Computer Systems: Architectures, 2011
Ein generisches Treiber-Framework zur HW/SW-Kommunikation mittels OSSS-RMI.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2011
Systemc refinement of abstract adaptive processes for implementation into Dynamically Reconfigurable Hardware.
Proceedings of the 2011 Forum on Specification & Design Languages, 2011
2010
Proceedings of the Distributed, Parallel and Biologically Inspired Systems, 2010
Mapping of Concurrent Object-Oriented Models to Extended Real-Time Task Networks.
Proceedings of the 2010 Forum on specification & Design Languages, 2010
PolyDyn - Object-Oriented Modelling and Synthesis Targeting Dynamically Reconfigurable FPGAs.
Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010
2009
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009
OSSS+R: A framework for application level modelling and synthesis of reconfigurable systems.
Proceedings of the Design, Automation and Test in Europe, 2009
2008
ACM Trans. Design Autom. Electr. Syst., 2008
Proceedings of the Forum on specification and Design Languages, 2008
Proceedings of the Languages for Embedded Systems and their Applications, 2008
Efficient Modelling and Simulation of Embedded Software Multi-Tasking using SystemC and OSSS.
Proceedings of the Forum on specification and Design Languages, 2008
2007
The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems.
Proceedings of the FPL 2007, 2007
2004
Proceedings of the Forum on specification and Design Languages, 2004