Kaiyan Chang

Orcid: 0000-0003-1920-0101

According to our database1, Kaiyan Chang authored at least 15 papers between 2020 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2025
One Size Does Not Fit All: A Distribution-Aware Sparsification for More Precise Model Merging.
CoRR, August, 2025

Step-level Verifier-guided Hybrid Test-Time Scaling for Large Language Models.
CoRR, July, 2025

ChipSeek-R1: Generating Human-Surpassing RTL with LLM via Hierarchical Reward-Driven Reinforcement Learning.
CoRR, July, 2025

Large Processor Chip Model.
CoRR, June, 2025

RTLMarker: Protecting LLM-Generated RTL Copyright via a Hardware Watermarking Framework.
CoRR, January, 2025

RTLMarker: Protecting LLM-Generated RTL Copyright via a Hardware Watermarking Framework.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024
Efficient Prompting Methods for Large Language Models: A Survey.
CoRR, 2024

Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Hybrid Alignment Training for Large Language Models.
Proceedings of the Findings of the Association for Computational Linguistics, 2024

2023
Learning Evaluation Models from Large Language Models for Sequence Generation.
CoRR, 2023

ChipGPT: How far are we from natural language hardware design.
CoRR, 2023

Full State Quantum Circuit Simulation Beyond Memory Limit.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2021
ArchNet: A data hiding design for distributed machine learning systems.
J. Syst. Archit., 2021

2020
ArchNet: Data Hiding Model in Distributed Machine Learning System.
CoRR, 2020


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