Kameswaran Vengattaramane

According to our database1, Kameswaran Vengattaramane authored at least 9 papers between 2006 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2011
A standard cell based all-digital Time-to-Digital Converter with reconfigurable resolution and on-line background calibration.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010
A 86 MHz-12 GHz Digital-Intensive PLL for Software-Defined Radios, Using a 6 fJ/Step TDC in 40 nm Digital CMOS.
IEEE J. Solid State Circuits, 2010

A 86MHz-to-12GHz digital-intensive phase-modulated fractional-N PLL using a 15pJ/Shot 5ps TDC in 40nm digital CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009
A 2-mm<sup>2</sup> 0.1-5 GHz Software-Defined Radio Receiver in 45-nm Digital CMOS.
IEEE J. Solid State Circuits, 2009

A 2mm<sup>2</sup> 0.1-to-5GHz SDR receiver in 45nm digital CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

Analysis of Fractional Spur Reduction using SigmaDelta-noise Cancellation in Digital-PLL.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

2007
Least-Squares and Minimax Design of Polynomial Impulse Response FIR Filters for Reconstruction of Two-Periodic Nonuniformly Sampled Signals.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

2006
Reconstruction of two-periodic nonuniformly sampled signals using polynomial impulse response time-varying FIR filters.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Reconstruction of M-periodic nonuniformly sampled signals using multivariate polynomial impulse response time-varying FIR filters.
Proceedings of the 14th European Signal Processing Conference, 2006


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