Vito Giannini
Orcid: 0000-0003-0508-2642
According to our database1,
Vito Giannini authored at least 36 papers
between 2005 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2024
Guest Editorial Introduction to the Special Section on the 2024 IEEE International Solid-State Circuits Conference (ISSCC).
IEEE J. Solid State Circuits, December, 2024
2021
Session 14 Overview: mm-Wave Transceivers for Communication and Radar Wireless Subcommittee.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2019
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2018
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2016
An 80 GHz Low-Noise Amplifier Resilient to the TX Spillover in Phase-Modulated Continuous-Wave Radars.
IEEE J. Solid State Circuits, 2016
13.5 A 4-antenna-path beamforming transceiver for 60GHz multi-Gb/s communication in 28nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
19.7 A 79GHz binary phase-modulated continuous-wave radar transceiver with TX-to-RX spillover cancellation in 28nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2014
IEEE J. Solid State Circuits, 2014
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
A 79GHz variable gain low-noise amplifier and power amplifier in 28nm CMOS operating up to 125°C.
Proceedings of the ESSCIRC 2014, 2014
2013
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
2012
Proceedings of the 2012 IEEE Wireless Communications and Networking Conference, 2012
2011
IEEE J. Solid State Circuits, 2011
Proceedings of the 73rd IEEE Vehicular Technology Conference, 2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
A 40nm CMOS highly linear 0.4-to-6GHz receiver resilient to 0dBm out-of-band blockers.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
Proceedings of the 2011 Future Network & Mobile Summit, Warsaw, Poland, June 15-17, 2011, 2011
2010
IEEE J. Solid State Circuits, 2010
A 86 MHz-12 GHz Digital-Intensive PLL for Software-Defined Radios, Using a 6 fJ/Step TDC in 40 nm Digital CMOS.
IEEE J. Solid State Circuits, 2010
Proceedings of the IEEE International Solid-State Circuits Conference, 2010
A fifth-order 880MHz/1.76GHz active lowpass filter for 60GHz communications in 40nm digital CMOS.
Proceedings of the 36th European Solid-State Circuits Conference, 2010
A sub-3dB NF voltage-sampling front-end with +18dBm IIP3 and +2dBm blocker compression point.
Proceedings of the 36th European Solid-State Circuits Conference, 2010
2009
IEEE J. Solid State Circuits, 2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
2008
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008
2007
IEEE J. Solid State Circuits, 2007
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the 33rd European Solid-State Circuits Conference, 2007
A CMOS 100 MHz to 6 GHz software defined radio analog front-end with integrated pre-power amplifier.
Proceedings of the 33rd European Solid-State Circuits Conference, 2007
2006
IEEE J. Solid State Circuits, 2006
Fully reconfigurable active-Gm-RC biquadratic cells for software defined radio applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
2005
A 1.2V-21dBm OIP3 4<sup>th</sup>-order active-g<sub>m</sub>-RC reconfigurable (UMTS/WLAN) filter with on-chip tuning designed with an automatic tool.
Proceedings of the 31st European Solid-State Circuits Conference, 2005