Kantilal Bacrania

According to our database, Kantilal Bacrania authored at least 12 papers between 1995 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2008

A 65nm CMOS CT ΔΣ Modulator with 81dB DR and 8MHz BW Auto-Tuned by Pulse Injection.

Yun-Shiang Shu, Bang-Sup Song, Kantilal Bacrania

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2007

A 10-bit 50-MS/s Pipelined ADC With Opamp Current Reuse.

Seung-Tak Ryu, Bang-Sup Song, Kantilal Bacrania

IEEE J. Solid State Circuits, 2007

2006

A 10b 50MS/s pipelined ADC with opamp current reuse.

Seung-Tak Ryu, Bang-Sup Song, Kantilal Bacrania

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2004

A 14-b linear capacitor self-trimming pipelined ADC.

Seung-Tak Ryu, Sourja Ray, Bang-Sup Song, Gyu-Hyeong Cho, Kantilal Bacrania

IEEE J. Solid State Circuits, 2004

2001

An 8-b 100-MSample/s CMOS pipelined folding ADC.

Myung-Jun Choe, Bang-Sup Song, Kantilal Bacrania

IEEE J. Solid State Circuits, 2001

A 14-b 20-Msamples/s CMOS pipelined ADC.

Hsin-Shu Chen, Bang-Sup Song, Kantilal Bacrania

IEEE J. Solid State Circuits, 2001

2000

A 13-b 40-MSamples/s CMOS pipelined folding ADC with background offset trimming.

Myung-Jun Choe, Bang-Sup Song, Kantilal Bacrania

IEEE J. Solid State Circuits, 2000

1999

A CMOS 10 b 60 Msample/s ADC with ultra fast gain control.

Kantilal Bacrania, Tzi-Hsiung Shu

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1998

A 200-MHz complex number multiplier using redundant binary arithmetic.

Kyung-Wook Shin, Bang-Sup Song, Kantilal Bacrania

IEEE J. Solid State Circuits, 1998

1997

A 15-b, 5-Msample/s low-spurious CMOS ADC.

Sung-Ung Kwak, Bang-Sup Song, Kantilal Bacrania

IEEE J. Solid State Circuits, 1997

1996

A 10-b 40-Msample/s BiCMOS A/D converter.

Tzi-Hsiung Shu, Kantilal Bacrania, Ravindra Gokhale

IEEE J. Solid State Circuits, 1996

1995

A 13-b 10-Msample/s ADC digitally calibrated with oversampling delta-sigma converter.

Tzi-Hsiung Shu, Bang-Sup Song, Kantilal Bacrania

IEEE J. Solid State Circuits, April, 1995