Karsten Scheibler

According to our database1, Karsten Scheibler authored at least 25 papers between 2011 and 2023.

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Bibliography

2023
Everything You Always Wanted to Know About Generalization of Proof Obligations in PDR.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

2022
Detection and Elimination of Constants to Strengthen k-Induction.
Proceedings of the Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2022

2021
ICP and IC3 with Stronger Generalization.
Proceedings of the Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2021

Benchmarking SMT Solvers on Automotive Code.
Proceedings of the Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2021

Two Decades of Formal Methods in Industrial Products at BTC Embedded Systems.
Proceedings of the Formal Methods - 24th International Symposium, 2021

ICP and IC3.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2019
Solving Constraint Systems from Traffic Scenarios for the Validation of Autonomous Driving.
Proceedings of the 4th SC-Square Workshop co-located with the SIAM Conference on Applied Algebraic Geometry, 2019

2017
Applying CDCL to verification and test: when laziness pays off.
PhD thesis, 2017

Accurate Dead Code Detection in Embedded C Code by Arithmetic Constraint Solving.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2017

2016
Applying Tailored Formal Methods to X-ATPG.
Proceedings of the 19th GI/ITG/GMM Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2016

Advancing Software Model Checking Beyond Linear Arithmetic Theories.
Proceedings of the Hardware and Software: Verification and Testing, 2016

Accurate ICP-based floating-point reasoning.
Proceedings of the 2016 Formal Methods in Computer-Aided Design, 2016

Accurate CEGAR-based ATPG in presence of unknown values for large industrial designs.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Mixed 01X-RSL-Encoding for fast and accurate ATPG with unknowns.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Multi-cycle Circuit Parameter Independent ATPG for interconnect open defects.
Proceedings of the 33rd IEEE VLSI Test Symposium, 2015

Towards Verification of Artificial Neural Networks.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2015

Improving test pattern generation in presence of unknown values beyond restricted symbolic logic.
Proceedings of the 20th IEEE European Test Symposium, 2015

2014
Implication Graph Compression inside the SMT Solver iSAT3.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2014

Test pattern generation in presence of unknown values based on restricted symbolic logic.
Proceedings of the 2014 International Test Conference, 2014

Using interval constraint propagation for pseudo-Boolean constraint solving.
Proceedings of the Formal Methods in Computer-Aided Design, 2014

Efficient SMT-based ATPG for interconnect open defects.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Circuit Parameter Independent Test Pattern Generation for Interconnect Open Defects.
Proceedings of the 23rd IEEE Asian Test Symposium, 2014

2013
Recent Improvements in the SMT Solver iSAT.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013

A Symbiosis of Interval Constraint Propagation and Cylindrical Algebraic Decomposition.
Proceedings of the Automated Deduction - CADE-24, 2013

2011
Superposition Modulo Non-linear Arithmetic.
Proceedings of the Frontiers of Combining Systems, 8th International Symposium, 2011


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