Prerna Budhkar

According to our database, Prerna Budhkar authored at least 8 papers between 2015 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

CPU Microarchitectural Performance Analysis of SVT-AV1 Encoder.

Prerna Budhkar, Navneet Rao, Jainaveen Sundaram, Tanay Karnik

Proceedings of the IEEE International Conference on Image Processing, 2023

2021

Efficient local locking for massively multithreaded in-memory hash-based operators.

Bashar Romanous, Skyler Windh, Ildar Absalyamov, Prerna Budhkar, Robert J. Halstead, Walid A. Najjar, Vassilis J. Tsotras

VLDB J., 2021

2019

Accelerating In-Memory Database Selections Using Latency Masking Hardware Threads.

Prerna Budhkar, Ildar Absalyamov, Vasileios Zois, Skyler Windh, Walid A. Najjar, Vassilis J. Tsotras

ACM Trans. Archit. Code Optim., 2019

Scalable Low-Latency Persistent Neural Machine Translation on CPU Server with Multiple FPGAs.

Eriko Nurvitadhi, Mishali Naik, Andrew Boutros, Prerna Budhkar, Ali Jafari, Dongup Kwon, David Sheffield, Abirami Prabhakaran, Karthik Gururaj, Pranavi Appana

Proceedings of the International Conference on Field-Programmable Technology, 2019

2018

Accelerating Irregular Applications Using Latency Masking Multithreaded Techniques.

Prerna Budhkar

PhD thesis, 2018

2016

FPGA-accelerated group-by aggregation using synchronizing caches.

Ildar Absalyamov, Prerna Budhkar, Skyler Windh, Robert J. Halstead, Walid A. Najjar, Vassilis J. Tsotras

Proceedings of the 12th International Workshop on Data Management on New Hardware, 2016

2015

High-Level Language Tools for Reconfigurable Computing.

Skyler Windh, Xiaoyin Ma, Robert J. Halstead, Prerna Budhkar, Zabdiel Luna, Omar Hussaini, Walid A. Najjar

Proc. IEEE, 2015

CAMs as Synchronizing Caches for Multithreaded Irregular Applications on FPGAs.

Skyler Windh, Prerna Budhkar, Walid A. Najjar

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015