Ke Xu

According to our database, Ke Xu authored at least 15 papers between 2006 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2020

BSR: A Balanced Framework For Single Image Super Resolution.

Dehui Kong, Fang Zhu, Yang Wei, Jianjun Song, Tongtong Zhu, Bengang Lou, Ke Xu

Proceedings of the 2020 ITU Kaleidoscope: Industry-Driven Digital Transformation, 2020

An Efficient Multi-scale Method for Single Image Super Resolution.

Dehui Kong, Ke Xu, Fang Zhu, Tongtong Zhu, Hengqi Liu, Yang Wei, Jianjun Song

Proceedings of the 16th International Wireless Communications and Mobile Computing Conference, 2020

A Design of 16TOPS Efficient GEMM Module in Deep Learning Accelerator.

Guoning Lu, Dong Xu, Ning Wang, Xiao Zhang, Degen Zhen, Hong Lei, Yunlong Bai, Dehui Kong, Hang Ruan, Zhifeng Chi, Xiankui Xiong, Ke Xu

Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

2019

A 4K Vision Computing Platform with Convolutional Neural Network Engine on FPGA.

Ke Xu, Fang Zhu, Hong Wang, Xiao Zhang, Bin Han, Jiewei Xiao, Dehui Kong, Zhou Han, Degen Zhen, Guoning Lu, Jisong Ai, Xin Liu, Zhi Huang

Proceedings of the 32nd IEEE International System-on-Chip Conference, 2019

2018

A Low-power 4096x2160@30fps H.265/HEVC Video Encoder for Smart Video Surveillance.

Ke Xu, Yu Li, Bo Huang, Xiangkai Liu, Hong Wang, Zhuoyan Wu, Zhanpeng Yan, Xueying Tu, Tongqing Wu, Daibing Zeng

Proceedings of the International Symposium on Low Power Electronics and Design, 2018

A Low-power Pyramid Motion Estimation Engine for 4K@30fps Realtime HEVC Video Encoding.

Ke Xu, Bo Huang, Xiangkai Liu, Xueying Tu, Zhuoyan Wu, Zhanpeng Yan, Peng Liu, Bin Han, Yu Li

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2012

Design a Low-Power H.264/AVC Baseline Decoder at All Abstraction Levels - A Showcase.

Ke Xu, Min Zhang, Chiu-sing Choy

J. Signal Process. Syst., 2012

2010

Methods for Power/Throughput/Area Optimization of H.264/AVC Decoding.

Ke Xu, Tsu-Ming Liu, Jiun-In Guo, Oliver Chiu-sing Choy

J. Signal Process. Syst., 2010

2009

Low-Power Bitstream-Residual Decoder for H.264/AVC Baseline Profile Decoding.

Ke Xu, Oliver Chiu-sing Choy

EURASIP J. Embed. Syst., 2009

2008

A Power-Efficient and Self-Adaptive Prediction Engine for H.264/AVC Decoding.

Ke Xu, Oliver Chiu-sing Choy

IEEE Trans. Very Large Scale Integr. Syst., 2008

A Five-Stage Pipeline, 204 Cycles/MB, Single-Port SRAM-Based Deblocking Filter for H.264/AVC.

Ke Xu, Chiu-sing Choy

IEEE Trans. Circuits Syst. Video Technol., 2008

2007

Power-Efficient VLSI Realization of a Complex FSM for H.264/AVC Bitstream Parsing.

Ke Xu, Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun

IEEE Trans. Circuits Syst. II Express Briefs, 2007

Priority-Based Heading One Detector in H.264/AVC Decoding.

Ke Xu, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun

EURASIP J. Embed. Syst., 2007

Low-power H.264/AVC baseline decoder for portable applications.

Ke Xu, Chiu-sing Choy

Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

2006

Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder.

Ke Xu, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006